R1-2503222 Timing acquisition and synchronization for Ambient IoT.docx
3GPP TSG-RAN WG1 Meeting #121	R1- 2503222
Malta, MT, May 19th – May 23rd, 2025

Agenda Item:	9.4.3
Source:	Ericsson
Title:	Timing acquisition and synchronization for Ambient IoT
Document for:	Discussion, Decision
1	
Conclusion
In the previous sections we made the following observations:
Observation 1	The longest duration of CAP is 2 OFDM symbols, while the smallest duration is 1/6th of OFDM symbol.
Observation 2	The combination of long preamble and short midamble will result in additional overhead in R2D control information.
Based on the discussion in the previous sections we propose the following:
Proposal 1	For SIP of the R-TAS select Alt 2-4 with pattern of ON-OFF-ON-OFF, where the duration of each part is (1/6,1/6,1/6,3/6) of an OFDM symbol, respectively.
Proposal 2	CAP can include all the agreed M values for PRDCH.
Proposal 3	The TBS included in the R2D control information to explicitly indicate the end of PRDCH transmission. However, in combination with this, a simple postamble with a distinct pattern—distinguishable from SIP, and PRDCH—can be used, especially in cases with high SFO.
Proposal 4	The pattern at the end of R2D transmission should violate Manchester encoding and it can be up to reader implementation. An example pattern can be ON-ON-ON-ON.
Proposal 5	The reader is not required to explicitly indicate whether a midamble is present at the end of the transmission or not.
Proposal 6	In case of D2R midamble, the presence, location (unit of interval in number of bits), and length is based on explicit indication by the reader.
One bit indication if a midamble is present or not
Two bits indication to indicate the unit of interval in number of bits
One bit indication to indicate the length of preamble/midamble (short or long), and if a combination of long preamble and short midamble is agreed than it can be 2-bit indication
Proposal 7	The signaling for D2R midamble is L2 control information and up to RAN2 to specify.
Proposal 8	To generate the m-sequence with n=5, use a polynomial that produces the sequence with lower complexity or reduced hardware requirements is often preferred. Down select between the following two alternatives:

Alt 1 
Alt 2: 

R1-2503226.docx
3GPP TSG RAN WG1 Meeting #121	R1-2503226
St Julian's, Malta, May 19 – May 23, 2025
Agenda Item:	9.4.3
Source:	Futurewei
Title:	Discussion on timing acquisition and synchronization aspects for A-IoT
Document for:	Discussion and Decision 

Conclusion
Observation 1: SIP option Alt 2-4 provides better preamble detection performance.
Observation 2: The device determines the end of R2D transmission by detecting patterns that violate Manchester coding rule.
Observation 3: It is beneficial to the device if the pattern at end of PRDCH transmission is known to the device.
Observation 4: Whether or not a midamble is present, the reader needs to explicitly indicate short or long preamble for PDRCH.
Observation 5: The number of midambles in D2R transmission could be zero.
Observation 6: Same two candidate values, 40 bits and 96 bits, can also be used for short preamble/midambles. 

Proposal 1: For the pattern of SIP of R-TAS, adopt Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with 1 OFDM symbol duration.
Proposal 2: For D2R transmission, short (long) preamble and short (long) midamble share a common m-sequence for  and .
Proposal 3: For D2R transmission, select one m-sequence for short (long) preamble and short (long) midamble. 
Proposal 4: For D2R transmission, two bits are sufficient to signal the following:
Short preamble and midamble, or long preamble and midamble
Midamble presence or absence 
Proposal 5: For long preamble/midamble propose to support two candidate values, 40 bits and 96 bits, for the interval between consecutive midambles, and between the preamble and the first midamble. 
Proposal 6: For D2R transmission, one bit is used by the reader to signal which candidate value to use, for both long and short preamble/midambles.

R1-2503296.docx
3GPP TSG-RAN WG1 Meeting #121                                                                                    R1-2503296
St Julian’s, Malta, May 19-23, 2025

Agenda Item:	9.4.3
Source:	Huawei, HiSilicon
Title:	Physical signals design
Document for:	Discussion and Decision

Conclusions
Based on the analysis in this contribution, we have the following observations and proposals:
Observation 1: For Alt 1-2, when the threshold is assumed to be constant for the SIP, and based on the ON part, the lack of an OFF voltage part degrades finding a proper threshold, resulting in inaccurate detection of the position of the falling edge, leading to a higher MDR.
Observation 2: For Alt 1-2, when the threshold is assumed to be updated based on a sliding window, the determined threshold is low, resulting in poor MDR performance due to false edges in the OFF part. 
Observation 3: For Alt 2-4, with the use of the detection threshold determination part, the threshold can be accurately determined and when it is fixed for the duration of the SIP, it results in a better MDR performance than Alt 1-2.
Observation 4: The variable duration of the last OFF part of the SIP caused due to the CP between SIP and CAP can be handled by device implementation by using a longer interval to detect the rising edge marking the end of the SIP and does not harm to the performance of SIP.
Observation 5: The impact of the uncertain location of the first rising edge of the CAP due to the CP between SIP and CAP can be avoided by using the two falling edges in CAP to determine the M value.
Observation 6: There is no need, and no technical merit, for re-visiting the implication of the RAN1#120bis agreement that the M value in CAP is the same as the M value in the subsequent PRDCH transmission.
Observation 7: There are a set of 186 31-length m sequences with good autocorrelation properties, and the PDRCH performance of these sequences differ slightly.
Observation 8: The overhead of 15-length sequence is twice of 7-length preamble. 
Observation 9: The performance of 7-length sequence can work well, and the target SNR gap between 31-length preamble and 7-length preamble is about 10dB. 
Observation 10: There are a set of 14 7-length m sequences with good autocorrelation property, and the PDRCH performance of these sequences differs slightly.
Observation 11: For 7-bit midambles, for a 400-bit packet, addition of 2 midambles result in an error floor at 1% BLER, but no error floor is seen when 3 midambles are used with an interval of ~138 bits. 
Observation 12: For 31-bit midambles, for a 400-bit packet, addition of 5 midambles result in an error floor at 1% BLER, but no error floor is seen when 6 midambles are used with an interval of 208 bits. 
Observation 13: For 7-bit midambles and a 400-bit packet without FEC, the insertion of only 2 midambles result in an error floor at 1% BLER, but no error floor is seen when 3 midambles are used with an interval of ~100 bits.
Observation 14: For 31-bit midamble and a 400-bit packet with 1/3 code rate, 7 midambles with an interval of ~156 bits is required to avoid an error floor.

Proposal 1: For the R2D SIP of the R2D timing acquisition signal, ON-OFF-ON-OFF with a ratio of 1:1:1:3 is supported (Alt 2-4), with the following design aspects:
It contains 3 parts - a detection threshold determination part (part #1), a high-voltage part (part #2) and a low-voltage part (part #3).
The detection threshold determination part (part #1) has a duration that is 1/3 of an OFDM symbol duration, with each of the high- and low-voltage transmissions being 1/6th of an OFDM symbol duration.
The high-voltage part (part #2) has a duration that is 1/6 of an OFDM symbol duration.
The low-voltage part (part #3) has a duration that is 1/2 of an OFDM symbol duration.
The number of chips used in the SIP is  = 6, with a chip duration of (1/SCS)/.
Proposal 2: For the device, detection of SIP is declared if the 3 OFF chips are detected.
Proposal 3: No specific optimization is required to handle CP before the SIP.
Proposal 4: No specific optimization is required to handle CP between SIP and CAP.
The variable duration of the last OFF part of the SIP due to the CP is handled by device implementation.
The uncertain location of the first rising edge of the CAP due to the CP is avoided by using the two falling edges in CAP to determine the M value.
Proposal 5: No specific optimization is required to handle CP within the CAP for M=2 and the same CP handling method for PRDCH is used.
Proposal 6: Device determines the end of R2D transmission based on violation of Manchester coding rule corresponding to the M value of the received PRDCH.
Note: It is up to the reader’s implementation how it ensures violation.
Proposal 7: The device always discards the last two ON chips of an OFDM symbol when M=24 with CP handling option 1, including for determining if Manchester coding violation has occurred.
Proposal 8: For D2R preamble, define a long sequence with the following details:
Polynomial: Decimal 41
Initial shift register value: 01001(x0x1x2x3x4)
Sequence: 0,1,0,0,1,0,0,0,0,1,0,1,0,1,1,1,0,1,1,0,0,0,1,1,1,1,1,0,0,1,1
Proposal 9: For D2R preamble, confirm the working assumption for length-7 and define a short sequence with the following details:
Polynomial: Decimal 13
Initial poly shift register value: 010 (x0x1x2)
Sequence: 0, 1, 0, 0, 1, 1, 1
Proposal 10: The length of the sequence of preamble and midamble are always the same.
Proposal 11: For the indication of preamble/midamble length:
1 bit is needed to indicate the length of preamble/midamble for Msg1.
For other Msg(s) except Msg1, device reuses the same length of the preamble/midamble as indicated in Msg1, 0 bits are required.
Proposal 12: For the interval between ambles in a D2R transmission, the maximum interval is 
	~130 bits for a 7-bit midamble.
	~200 bits for a 31-bit midamble. 
Proposal 13: For the interval between the last midambles and the end of the D2R transmission, the maximum interval is 
~100 bits for a 7-bit midamble.
~150 bits for a 31-bit midamble.
Proposal 14: Midambles are inserted with a period corresponding to {75, 100, 125, 150, 175, 200, 225, 250} bits at Tb = 266.67 μs, indicated in D2R scheduling information.
If the D2R transmission has shorter duration than a first midamble insertion, no midambles are inserted.

R1-2503301-Nokia-9.4.3-AIoT-TimingSync.docx
3GPP TSG RAN WG1 #121	R1-2503301
St Julian's, Malta, May 19th - 23rd, 2025

Source:	Nokia
Title:	AIoT Timing acquisition and synchronization
Agenda item:	9.4.3
Document for:	Discussion and Decision

Conclusion

In this contribution we have made the following observations and proposals:
List of Observations
Observation 1:	Start delimiter should be long enough to ensure reliable detection due to large sampling offset observed in the AIoT tag before estimating/correcting from preamble.
Observation 2:	SIP design should consider level detection followed by edge detection to ensure reliability while spending lower power.
Observation 3:	SIP with more than single ON and OFF pattern increases the FAR due to any adjacent NR transmissions, such as LP-WUS or LP-SS, which also uses OOK type of signaling. Thus, to ensure robustness against such NR transmissions, having Alt-2-4 design spanning ONE OFDM symbols is beneficial.
Observation 4:	Preamble sequences must have better autocorrelation properties to obtain better timing accuracy even with large sampling offset.
Observation 5:	Increasing the value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length.
Observation 6:	Having a shorter CAP sequence may trigger higher FAR for higher M values than the one with lower M values.
Observation 7:	RAN1 to consider designing PRDCH preamble by ensuring uniform distribution of 1’s and 0’s, i.e., by simply repeating 1,0 pattern to the desired length.
Observation 8:	Use of  provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration.
Observation 9:	The length of preamble sequence must be decided considering coverage, timing estimation accuracy, and the robustness against SFO.
Observation 10:	As the Manchester encoding is assumed for PRDCH payload, midamble may not be needed as Manchester coding itself is a self-synchronizing sequence.
Observation 11:	Using postamble and preamble together with the length of PRDCH transmission, an AIoT device can determine the sampling offset/drift experienced.
Observation 12:	Detection of violating Manchester coding rule based on reader’s implementation may not be a better solution as the AIoT device can use the Manchester encoding failure to readjust the clock recovery/sampling or to ensure detection error.
Observation 13:	The need for midamble depends on the type of modulation used for D2R transmission. If the D2R transmission uses self-synchronizing modulation schemes like FM0, Miller, or MC, then the need for midamble is not essential.
Observation 14:	The use of midamble in the D2R transmission may assist the reader to perform resynchronization using a specific pattern and to adjust the sampling rate accordingly.
Observation 15:	The size and the interval of midamble should be considered both from the overhead and the detection performance.
Observation 16:	The choice of OOK chip duration does not impact the midamble insertion if the number of bits is restricted to 96 or 128bits for 20% or 25% loss in chip level synchronization, respectively.
Observation 17:	As FEC is adopted in D2R transmission, device cannot autonomously terminate the transmission by sending postamble for early termination, since the coding rate is fixed by the size of the information bits and the codeword length, both are signaled in the previous PRDCH control.
Observation 18:	The postamble may improve detection if it is used as stop bits to ensure reception of all payload bits in PDRCH before FEC decoding when there is larger SFO at the AIoT device.

List of Proposals
Proposal 1:	RAN1 shall consider SIP pattern spanning 1 OFDM symbol using Alt-2-4 pattern over Alt-1-2.
Proposal 2:	RAN1 to consider designing PRDCH preamble using alternate 1’s and 0’s.
Proposal 3:	RAN1 should consider a R2D preamble sequence of length at least 32 to ensure reliable detection and to lower FAR.
Proposal 4:	RAN1 shall not consider detection of violating Manchester coding rule based on reader’s implementation as the reader is controlling both transmission size and power level.
It would be the better design for the device to be able to know the end of the codeword based on transmission payload indications. The detection of violating Manchester coding rule based on reader’s implementation may lead to ambiguous device behavior.
Proposal 5:	The m-sequence for root n=3 can use either  or  with a certain initialization sequence that can be configured by the reader.
Proposal 6:	The m-sequence for root n=5 can use either  or  with a certain initialization sequence that can be configured by the reader.
Proposal 7:	The midamble of length 7 shall be inserted for every 96/128 bits of payload.
Proposal 8:	The use of postamble for PDRCH transmission shall be signaled by the reader depending on the payload size and the SFO accuracy of the AIoT device.

R1-2503313.docx
3GPP TSG RAN WG1 #121												        R1-2503313
St Julian’s, Malta, May 19th – 23rd, 2025
Title: 	Discussion on Ambient IoT signals
Source: 	ZTE Corporation, Sanechips
Agenda item:	9.4.3
Document for:	Discussion and decision
Conclusion
In this contribution, the downlink and uplink signal/channels are discussed for A-IoT. We have the following observations and proposals.
Observation 1: CP and the first part(e.g., first one-third part) in SIP can be used for threshold training.
Observation 2: GNB reader can ensure an OFF period before SIP transmission to avoid collision with R2D transmission. The OFF period before SIP transmission and the first part(e.g., first one-third part) in SIP can be also used for threshold training.
Observation 3: More transition edges within the SIP pattern may increase the detecting complexity.
Observation 4: ‌The SIP pattern "1000" (M=4) has 2 dB MDR gain than the "101000" pattern (M=6) at both BLER=0.1 and BLER=0.01.
Observation 5: SIP pattern "1000" (M=4) demonstrates a significantly larger deviation from the R2D data compared to the "101000" pattern (M=6).
Observation 6: In case of data with M=6, the FAR of Alt 2-4 is about 3~4 times higher than that of Alt 1-2.
Observation 7: For length 7, S 1-1 has about 2.5 dB performance gain than S 1-2 at BLER=0.1.
Observation 8: For length 31, S 2-1 has better performance compared to S 2-2.
Observation 9: For D2R transmission with a TBS of 96 bits, which occupies approximately 76.6ms, at least one midamble(in the middle or end of PDRCH) can be supported.
Observation 10: For D2R transmission with a TBS of 400 bits, which occupies approximately 319.2ms, at least a preamble and 2 midambles(one is located near the end of PDRCH) should be supported.
Observation 11: For D2R transmission with a TBS of 1000 bits, which occupies approximately 798 ms, at least a preamble and 3 midambles(one is located near the end of PDRCH) should be supported.

Proposal 1: Support SIP pattern as "1000" (M=4).
Proposal 2: For R2D postamble pattern, three low voltage can be considered and the end position of the third low level serves as the D2R timing reference point.
Proposal 3: Confirm the working assumption: Short preamble/midamble is generated based on n=3.
Proposal 4: In one D2R transmission, the length of preamble and midamble should be same.
Proposal 5: Sequence [1,0,1,0,0,1,1] is proposed for 7-length amble(s).
Proposal 6: Sequence [1,1,1,0,1,1,0,0,0,1,1,1,1,1,0,0,1,1,0,1,0,0,1,0,0,0,0,1,0,1,0] is proposed for 31-length amble(s).
Proposal 7: The following methods can be considered to determine the interval value:
- Method 1: Use coarse granularity to reduce the number of candidate values and indicate one interval value from the candidate values.
i. A value of infinity or a value larger than 12000(e.g., 19200) can be considered to be used as indication when no midamble is needed within the PDRCH transmission.
ii. The candidate interval values can be one of the following:
1. Candidate 1: 150, 300, 600, 1200, 2400, 4800, 9600, 19200.
2. Candidate 2: 150, 300, 600, 1200, 2400, 4800, 9600, infinity.
iii. 3 bits are used to indicate one interval value from the candidate values.
- Method 2: Indicate a set of interval candidates by interval duration and determine one by Tb.
i. 1 or 2 bits are used to indicate one interval duration.
Proposal 8: The reader can explicitly indicate with one bit whether a midamble additionally presents at the end.

R1-2503360-vivo-AI943.docx
3GPP TSG RAN WG1 #121	R1-2503360
St Julian’s, Malta, May 19th – 23rd, 2025

Title:          Remaining issues on timing acquisition and synchronization for AIoT
Source:       vivo
Agenda Item:  9.4.3
Document for: Discussion and Decision
Conclusion
In this contribution, we provide our views on R2D and D2R amble design, and the observations and proposals are provided as follows.
R2D
Observation 1: The SIP pattern can be detected by measuring the duration of 3 consecutive OFF chips.
SIP Alt 2-4 cannot work using detection method 1, since the duration of 3 off chips can hardly be distinguished with the OFF chip under PRDCH using M=2.
This detection method assumes 10% initial clock accuracy (10^5ppm) generally used in SI phase.
Observation 2: The SIP can be detected based on detection of ON:OFF ratio
ON/OFF ratio of 1:3 in PRDCH with M=12 can hardly be distinguished from SIP Alt 2-4 if the initial clock error is up to or around 10^6 ppm (100%).
PRDCH with M=12 is not a problem for SIP Alt 1-2, since the duration of ON/OFF pattern in SIP Alt 1-2 is three times of that for PRDCH with M=12.
Observation 3: To ensure SIP Alt 2-4 detectable and avoid ambiguity with PRDCH transmission, up to 10^5 ppm initial clock accuracy should be achieved at AIoT device, and SIP can be detected based on ON: OFF ratio.
Observation 4: The SIP occupies one OFDM symbol and ends with OFF state/low voltage, the CP part is by default OFF state with time duration of 4.69us/5.21us, which can be utilized for threshold training for SIP detection.
Observation 5: For SIP Alt 1-2, OFF duration in SIP can be detected with well-trained threshold
The falling edge after ON chip can be reliably detected after reception of CP part with OFF state and first ON chip.
The rising edge between SIP and CAP can also be reliably detected, since the threshold can be trained with ON/OFF chips provided by SIP itself.
Observation 6: Alt 1-2 achieves better MDR with lower FAR rate compared with Alt 2-4.
For SIP Alt 1-2 detected based only on OFF duration, and only OFF duration is measured which impacts the SIP detection performance. 
While for SIP Alt 2-4 detected based on ON:OFF ratio, both ON duration and OFF duration should be measured, detection method based on two variables further magnifies the impact of non-ideal OOK waveform and the measurement error.
Proposal 1: Support SIP Alt 1-2: ON-OFF with a ratio of 1:3.
Proposal 2: M value for PRDCH is same as that for CAP part in R2D preamble.
Observation 7: In RAN2#129 meeting, RAN2 already made agreements that the length information can be provided in MAC header, so the AIoT device can know the ending position of the PRDCH transmission.
Observation 8: In RFID C1Gen2, the same design logic is used that the length is delivered along with the R2D signaling itself, and there is no postamble in reader to tag transmission.
Proposal 3: Neither R2D post-amble or defining violation of Manchester coding rule is supported.

D2R
Observation 9: Compared to one-way channel, channel condition varies faster for two-way channel which will lead to degraded performance for D2R detection with pre/mid-amble.
Proposal 4: The amble options should be evaluated assuming fading channel for both CW2D link and D2R link. Otherwise, the presence of midamble and required interval between consecutive ambles will be underestimated if fading channel is modelled only for D2R link.
Observation 10: Compared to n = 3, 
for 20 bits payload size with preamble only, the performance gain of n = 4 is approximately 12 dB and 20 dB at 10% BLER and 1% BLER, respectively.
for 96 bits payload size with preamble + midamble(s) under similar amble overhead, the performance gain of n = 4 is approximately 5 dB and 10 dB at 10% BLER and 1% BLER, respectively.
for 96 bits payload size with preamble + midamble(s) under similar amble overhead, even when the computational complexity of n=4 is much lower (with less hypothesis number), the performance of n = 4 is still better than n = 3.
Observation 11: When the performance gap between different amble length configurations is too large, e.g., the performance gap between n=3 and n=5 is 28 dB or 12 dB for preamble only case and preamble+ midamble case, large performance gap should not be used as principle to select amble length.
There are lots of methods to achieve large performance gap using n=4 in implementation, large performance gap is easy to achieve in implementation.
Proposal 5: Do not confirm the working assumption of n=3 for short pre/mid-ambles.
Short pre/mid-ambles are generated based on m-sequence with n = 4.
Observation 12: Although only a single sequence is supported for a given length, it is preferred to provide the sequence generation polynomial in specification. 
If a binary sequence is provided in specification directly without polynomial, it may imply that the device should use NVM to store the predefined sequences in implementation.
Proposal 6: For the m-sequence used for D2R pre/mid-amble, 
If {n=5, n=4} is used for long and short D2R pre/mid-amble, the m-sequence is generated by:
n=5: , and .
Note: The output m sequence is [0 0 1 0 1 1 0 0 1 1 1 1 1 0 0 0 1 1 0 1 1 1 0 1 0 1 0 0 0 0 1].
n=4: , and .
Note: The output m sequence is [0 0 1 1 0 1 0 1 1 1 1 0 0 0 1].
If {n=5, n=3} is used for long and short D2R pre/mid-amble, the m-sequence is generated by:
n=5: , and .
Note: The output m sequence is [0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1].
n=3: , and .
Note: The output m sequence is [0 1 1 1 0 0 1].
Observation 13: The required absolute time intervals between consecutive ambles are similar, regardless of different or same amble lengths, bit duration Tb and {chip duration, SFS factor R} combinations, because the required time interval is mainly determined by the channel condition.
Observation 14: If time interval between ambles is determined based on Tb used for D2R transmission, proper number of bits G for time interval would vary with Tb to achieve same absolute time intervals, which increases signaling overhead. 
Proposal 7: A reference bit duration Tb,ref is defined firstly, and the intervals between ambles are determined based on indicated interval in number of bits G, i.e., time interval is G* Tb,ref, irrespective of actual bit durations used for PDRCH transmission.
where G is indicated and selected from {200, 400, 600} bits, and Tb,ref=33.33μs can be considered as a reference bit duration used to determine the time intervals between consecutive ambles.
If other Tb value is used as reference bit duration Tb,ref, the value set of G bits can be adjusted accordingly.
Proposal 8: The length of pre/mid-amble and the presence/location of midamble are indicated by Reader separately
1 bit is used to indicate the length of pre-mid/amble.
2 bits indication field is used to indicate the presence and location of midamble, and when 00 is indicated by Reader, it means that no midamble is needed in the D2R transmission.
Proposal 9: There is no need for Reader to explicitly indicate a midamble is additionally present at the end of PDRCH.
Observation 15: Motivation of multiple sequences that Multiple AIoT devices use different sequences for concurrent D2R transmission to different readers is not valid.
Observation 16: It is not clear how randomization can provide any benefit if the two devices are already FDM multiplexed in different frequency shift.
Proposal 10: For a given sequence length, do not support multiple M sequences, single sequence is sufficient.

R1-2503420.docx
3GPP TSG RAN WG1 #121	R1-2503420
St Julian's, Malta, 19 - 23 May, 2025

Agenda Item:	9.4.3
Source:	NEC
Title:	Discussion on timing acquisition and synchronization
Document for:	Discussion and Decision
1	
Conclusion
In this contribution, we give our views on control and other aspects of ambient IoT. We propose that:
Proposal 1: For the pattern of SIP of R-TAS, support Alt 2-4.
Proposal 2: Support SIP can start from the start of any OFDM symbol which satisfies the timing requirement of R2D and D2R, e.g., satisfy the requirement of TD2R_min and TD2R_max.
Proposal 3: R2D postamble can be at least two “ON” chips to violate Manchester code.
Proposal 4: A suggested interval list could be {128,256,376,512,768,1024,2048,4096}.
Proposal 5: Multiple list or set of interval values can be defined for PDRCH transmission with individual parameters, to further decrease the signalling overhead for interval value indication.
Proposal 6: Support to select at least one m-sequence from the followings: , , , .
Proposal 7: Support use ratio of number of bits after FEC coding and repetition to the indicated interval values to determine the presence of the last midamble located at the end, wherein the indicated interval value is used to determine the presence and location determination of other mid-ambles.
Proposal 8: Explicit indication with an additional bit to indicate the presence of the last midamble located at the end has the lowest complexity for device.
Proposal 9: Support pre-define rules with higher priority than the explicit indication for presence determination of the last midamble located at the end:
If the length or length ratio of the last interval is less than a threshold, then the last midamble isn’t present regardless of the additional bit indicates
If the length or length ratio of the last interval is higher than another threshold, then the last midamble is present regardless of the additional bit indicates
Proposal 10: Select one of the alternatives to apply small frequency shift on amble(s):
Alt 1: For OOK modulation, each “1” in the sequence is transmitted with 2R chips as [0 1 0 1 …], and each “0” in the sequence is transmitted with 2R chips as [1 0 1 0 …]; for BPSK modulation, the transmitted 2R chips for “1” and “0” in the sequence are [-1 +1 -1 +1 …] and [+1 -1 +1 -1 …], respectively.
Alt 2: For the whole sequence, repetition of 2R times within the same duration of the sequence. For OOK modulation, each “1” stands for high voltage and each “0” stands for low voltage; for BPSK modulation, each “0” is replaced with “-1”.

R1-2503517 Discussionontiming acquisition and synchronization for Ambient IoT.docx
3GPP TSG-RAN WG1 Meeting #121         						 	R1-2503517
St Julian's, Malta, 19 - 23 May, 2025

Agenda Item:     9.4.3
Source:	Spreadtrum, UNISOC
Title:	Discussion on timing acquisition and synchronization for Ambient IoT
Document for:	Discussion and decision

Conclusions
Obsevation1: For Alt1-2 that ON followed by OFF with a duration ratio of 1: 3, the MDR can achieve below 1%, and FAR can reach around 0%. Therefore, the reliability of Alt 1-2 is enough, and the “OFF” duration can be distinguished from subsequent CAP and PRDCH.
Proposal 1: For start indicator part in the R2D preamble:
Alt 1-2 should supported that ON followed by OFF with a duration ratio of 1:3.
Proposal 2: For CAP in R2D,
The pattern of CAP is ON-OFF-ON-OFF.
CP handling Alt M2-1-1 is used for M=24.
The last 2 out of M OOK chips at the end of the OFDM symbol are ‘ON’, the two OFF parts is used to determine the chip duration. 
Proposal 3: To determine or derive the end of PRDCH transmission:
Postamble is supported, and the pattern is determined based on reader’s implementation.
Device assumes that reader will definitely transmit postamble.
Proposal 4: For the length of D2R amble(s), 
When midamble is not present,  preamble should be a short sequence by default.
For short preamble/midamble, the working assumption can be conformed that short preamble/midamble is generated based on n=3.
Proposal 5: It is not necessary to explicitly indicate with one bit whether a midamble is additionally present at the end of PDRCH.
Observation 2: 
With one short preamble and one short midamble for PDRCH transmission, totally additional 14 + X bits registers is needed for device 1. 
14 bit registers for temporary buffer because of ambles insertion, X = log2(length of X-ambles) + log2(interval for X-amble insertion) bits registers for counting
With one long preamble and one long midamble for PDRCH transmission, totally additional 62 + X bits registers is needed for device 1. 
62 bits registers for temporary buffer because of ambles insertion, X = log2(length of X-ambles) + log2(interval for X-amble insertion) bits registers for counting
With one long preamble and two long midamble for PDRCH transmission, totally additional 93+X bits registers is needed for device 1. 
93 registers for temporary buffer because of ambles insertion, X = log2(length of X-ambles) + log2(interval for X-amble insertion) bits registers for counting
Proposal 6: The maximum number of midamble should be constrained, and at least for long midamble case, no larger than 1.

R1-2503538 Discussion on timing acquisition and synchronization functionalities for Ambient IoT.docx
3GPP TSG RAN WG1 #121                                            R1-2503538                
St Julian's, Malta, May 19th-23rd, 2025

Source:	TCL
Title:	Discussion on timing acquisition and synchronization functionalities for Ambient IoT
Agenda Item:	9.4.3
Document for:	Discussion and Decision
Conclusion
In this contribution, we provide our views on the frame structure and required functionalities of R2D/D2R signal for AIoT. The observations and proposals are listed as below:
Observation 1: If the start of SIP is not aligned with that of OFDM symbol, and M value is small (e.g., 4), single ON-OFF pattern for SIP could be considered.

Observation 2: If the start of SIP aligned with that of OFDM symbol, and M value is relatively large (e.g., 16), ON-OFF-ON-OFF pattern for SIP could be considered.

Observation 3: In last meeting, SIP duration with one OFDM symbol has been supported.

Observation 4: Device only transmits RN16 in Msg 1, and in this case one D2R preamble and one Midamble is enough to avoid discontinuous transmission of RN16, where D2R Midamble used for indicating end of PDRCH transmission. 

Observation 5: If start of preamble as reference point, SFO (δ) could be considered for this interval based on the compensation from reader side, e.g., the interval (△T) between the preamble and the first midamble is △T+δ or △T-δ.

Observation 6: To avoid other signaling overhead, we think one bit to indicate whether a midamble is additionally present at the end is not necessary.




Proposal 1: Support Alt 1-2 (Single ON-OFF transmission) or Alt 2-4 (ON-OFF-ON-OFF) for SIP pattern design.

Proposal 2: Support the entire length of SIP set is one OFDM symbol length for device 1.

Proposal 3: Support Manchester coding rule violation applied by reader’s implementation for end of PRDCH transmission.

Proposal 4: M sequence length like n=3 or n=5 is up to the length of D2R preamble and Midamble.

Proposal 5: For indicating the interval between consecutive midambles, consider the start of midamble and midamble number as indication messages to avoid diverse interval values used for Msg 1 or Msg 3.

Proposal 6: For indicating the interval between the preamble and the first midamble, if start of preamble as reference point, SFO impact should be considered for this interval.

Proposal 7: Do not support one bit to indicate whether a midamble is additionally present at the end.

Proposal 8: Using M-sequence special design (e.g., sequence length) to implicitly indicate the end of PDRCH transmission.

Proposal 9: Consider using predefined method to indicate the end of PDRCH transmission, e.g., if Msg 1 only transmits RN 16 or one bit message, one fix structure could be considered like D2R preamble + RN16/one bit message+D2R midamble, where miamble used for indicating the end of PDRCH transmission.
R1-2503568.docx
3GPP TSG RAN WG1 #121		R1-2503568 
St Julian’s, Malta, May 19th – 23th, 2025
Agenda item:	9.4.3
Source:	Samsung
Title:	Views on timing acquisition and synchronization
Document for:	Discussion and decision
1	
Conclusion



In this contribution, we shared our views on timing acquisition and synchronization signals. More specifically, the discussion involved remaining issues on R2D/D2R preamble design, D2R midamble design, and necessities of R2D/D2R postamble. To this end, the following observations and proposals were made:
In the previous sections we made the following observation:
Observation 1	SIP based on Alt 1-2 provides necessary functionalities for setting a detector threshold and start indication.
Observation 2	CAP using the same M value as the following PRDCH is the most simple and precise method for a device to acquire chip length without any unnecessary steps.
Observation 3	If random states of chips corresponding to CP are places immediately preceding the CAP, it will make the device detection of chips and synchronization more challenging for M=24.
Observation 4	Allowing a reader to have a controllability of attaching midamble at the end of PDRCH has clear benefits, while there was a concern on additional signaling overhead, albeit it is a higher layer signaling.
Observation 5	After inserting one or more midambles according to the indicated interval, if the remaining PDRCH transmission length is relatively large with respect to the indicated interval, it is beneficial to attach additional midamble at the end of PDRCH based on an implicit rule without requiring an explicit indication.
Observation 6	Manchester coding rule violation by reader’s implementation to indicate the end of PRDCH transmission is not preferable due to device blind detection complexity and possibility of false alarm.
Observation 7	Unless explicitly specifying the R2D postamble, there is no need to agree on Manchester coding rule violation by reader’s implementation to be used by the device to determine the end of PRDCH transmission.
Based on the discussion in the previous sections we propose the following:
Proposal 1	For the pattern of SIP of R-TAS, Alt 1-2 (ON-OFF with a ratio of 1:3) is supported.
Proposal 2	CAP uses the same M value corresponding to the M value used in the following PRDCH.
Proposal 3	For CP handling for M=24, Option 1 (The last 2 out of M OOK chips at the end of an OFDM symbol are always ‘ON’) is supported.
Proposal 4	For the short D2R preamble/midamble format, confirm the working assumption of n=3.
Proposal 5	If the remaining PDRCH transmission length after the last midamble is exactly the same as the indicated interval, a device attaches midamble at the end of PDRCH.
Proposal 6	If the remaining PDRCH transmission length after the last midamble is larger than a certain threshold with respect to the indicated interval, a device attaches midamble at the end of PDRCH.
Proposal 7	The format of D2R preamble between long and short formats is indicated using 1 bit in the preceding PRDCH control information.
Proposal 8	The presence of D2R midamble is indicated via interval indication without a separate dedicated field, e.g., one codepoint of interval is reserved for indicating no midamble.
Proposal 9	The interval for midamble is indicated in the preceding PRDCH using L-bit field, where one codepoint is reserved for no midamble and the rest of codepoints indicate the interval in bytes, i.e., 1, 2, …, 2L-1 bytes.
Proposal 10	The R2D postamble is an inverse of R2D SIP.
Proposal 11	D2R postamble is not supported.

R1-2503610 Discussion on timing acquisition and synchronization.docx
3GPP TSG RAN WG1 #121                     	R1-2503610
St, Julians, MT, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source:	InterDigital, Inc.
Title:	Discussion on timing acquisition and synchronization
Document for:	Discussion and Decision
Conclusion

The following observations are provided for discussion in RAN1#120bis:
Observation 1:	For a relatively small payload (~100 bits) at 1kbps data rate, the latency reduction from a hybrid preamble/midamble format can reduce transmission latency by as much as 12% compared to a long preamble/midamble format.
Observation 2:	For a relatively small payload (~100 bits) at 1kbps data rate and no mobility, a hybrid preamble/midamble format can provide a ~1.5 dB gain in performance compared to a short preamble/midamble format when there is no device or reader mobility.
Observation 3:	Channel Doppler, and not device SFO, has the dominant impact on maximum allowable interval between preamble and successive midambles.
Observation 4:	Configured midamble spacing should be provided in consistent regardless of PDRCH chip duration.
The following proposals are provided for discussion in RAN1#120bis:

Proposal 1:	Confirm the working assumption that short format preamble is a 7-chip m-sequence.
Proposal 2:	Device configuration supports PDRCH transmission with a long format preamble and short format midambles.
Proposal 3:	The midamble spacing indicated to a device in units of chips for a PDRCH transmission should scale proportionally with the chip rate configured for the PDRCH.
Proposal 4:	A reader can indicate 4-8 evenly spaced midamble intervals between 20m and 60 ms, equivalent to 120-360 chips at 1kbps.

R1-2503660.docx
3GPP TSG RAN WG1 #121                                                                                     R1-2503660
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source:	Lenovo
Title:	Discussion on timing acquisition and synchronization for Ambient IoT
Document for:	Discussion 

Conclusion
In this contribution, we focus on  timing acquisition and synchronization for ambient IoT and have observations and proposals on preamble/midamble/postamble for R2D and D2R, respectively as follows:
Proposal 1: For the SIP of R-TAS, prefer to support Alt1-2 from the device side. 
Proposal 2: Which method of TBS or ending signal is used for acquiring the end of PRDCH is determined based on whether the remaining portion of the last OS after the PRDCH in R2D transmission is sufficient to accommodate the ending signal.
Proposal 3: On ending signal, the length needs to be explicitly or implicitly indicated to the device.

Proposal 4. For indicating the same interval between consecutive ambles, one of the following options is considered:
Option 1. Using a predefined mapping table where each entry indicates an exact length of interval.
Option 2. Using an m-bit indicator and a predefined length unit (e.g., n-byte).
Option 3. Using a scaling factor and D2R payload size (as indicated by TBS).
Proposal 5. When midamble is present, support the case of long preamble and short midamble.
Proposal 6. Support using D2R midamble resource for interference estimation. 
Proposal 7. Whether D2R midamble resource is reused for interference estimation needs to be indicated to device by reader. 
Proposal 8: For the repetition-based D2R transmission, support to acquire the end of transmission of each repetition by using midamble following the repetition.



9.4.3 Discussion on timing acquisition and synchronization aspects for A-IoT.docx
3GPP TSG RAN WG1 #121          						R1- 2503704
Malta, Malta, May 19th – 23rd, 2025

Source:	Tejas Networks Ltd.
Title:	Discussion on timing acquisition and synchronization of A-IoT
Agenda item:	9.4.3
Document for:     Discussion and Decision


Conclusion
This work includes the functionalities of preamble, midambles, and postamble for timing acquisition and synchronization of A-IoT. We have made the following observations and proposals related to the above-mentioned aspects:

Observation 1: CAP duration of 1 OFDM symbol ensures sufficient difference between the PRDCH chip duration and CAP chip duration. CAP chip duration is half of the ON/OF chip duration of PRDCH.  
Proposal 1: We propose a fixed CAP duration of 1 OFDM symbol. 
Proposal 2: The CP part of CAP can be handled in two ways:
Option 1: Add the last part of OFDM symbol to CP
Option 2: Entire CP duration is OFF
Proposal 3: The device my detect the CAP duration between two falling edges or between the first falling edge and next rising edge after the end of SIP.
Proposal 4: Reader can explicitly send 1 bit information to indicate the presence/absence of midambles in D2R.
Observation 2: The R2D message structure for rel-19 devices can be extendable to rel-20 devices. Thus, Manchester coding violation to indicate the end of PRDCH may not work for future rel-20 devices.  
Proposal 5: The L1 R2D control information should carry the length of PRDCH for rel-19 devices (device type-1) to define the end of R2D transmissions for that device type.
Proposal 6: Reader does not need to send 1-bit to indicate a midambles is present at the end if the reader sends the length of PRDCH.


4. 
R1-2503715 Timing acquisition and synchronization for Ambient IoT.docx
3GPP   RAN1#121                                                                                                 R1-2503715		                                                   
Malta , MT, May 19th-23rd, 2025

Agenda item:   9.4.3
Source: 	    Lekha Wireless Solutions
Title:	               Timing acquisition and synchronization for Ambient IoT

Document for:    Decision



1. 
Conclusion
In this document, we discuss about the details of the control signalling for midamble sequences for the Ambient IoT devices and the following observation and proposal is made:

Observation 1: For the midamble design, the presence, the position, length and frequency of occurrence of the midamble has to be specified via R2D signalling. The midamble insertion rate is a function of  the error performance and transmission rate.

Proposal 1: For the design of the D2R midamble, the following aspects should be specified using R2D signaling: 1. The presence of the midamble. 2. The position of the midamble 3. The length of the midamble 4. The frequency of occurrence of the midamble. The insertion rate of the midamble must be carefully selected to balance appropriate error performance with transmission rate.

4. 
R1-2503735 Timing and Sync 9.4.3.docx
3GPP TSG RAN WG1 #121	R1-2503735
St Julian's, Malta, May 19th - 23rd, 2025

Source:	Ofinno
Title:	Views on Timing acquisition and synchronization
Agenda item:	9.4.3
Document for:	Discussion and Decision
Conclusions
In this paper we make the following observations and proposals: 
Proposal 1: For the SIP of R-TAS, prefer support Alt 1-2. 
Observation 1: The minimum duration for the CAP, for M = 24, is ~11.11 us.
Observation 2: Proper CP handling is critical for CAP detection. 
Proposal 2: RAN1 to support using violation of Manchester coding rule to determine the end of the R2D transmission.
Proposal 3: RAN1 to not introduce postamble for R2D.  
Proposal 4: Do not support the case of long preamble and short midamble. 
Proposal 5: Do not support an additional bit to indicate whether a midamble is present at the end of the D2R transmission. 
R1-2503795.docx
3GPP TSG RAN WG1 #121                                                                                  R1-2503795
St Julian’s, Malta, May 19th – 23rd, 2025

Source:             CATT
Title:             	Ambient IoT timing and synchronization
Agenda Item:    9.4.3
Document for:  Discussion and Decision


Conclusions
In this contribution, we discuss timing acquisition and synchronization design in support of Ambient IoT devices, and give the following observations and proposals:
Observation 1: The ON/OFF pattern of SIP should be designed considering both scenarios that the energy harvest for A-IoT charging or other R2D transmission may or may not take place immediately before the SIP.
Observation 2: The SIP pattern Alt 2-4 can meet the SIP detection requirement of target MDR of up to 1% for FAR of up to 1%, but the SIP pattern Alt 1-2 cannot meet such requirement.
Observation 3: The counting of new transition edge of CP would degrade the synchronization performance and increase the A-IoT device complexity for M values > 12 for both Option 1 and Option 3 in the agreement in RAN1#120bis.
Observation 4: Since the A-IoT D2R does not have the orthogonality with UL NR signal, NR A-IoT R2D signal would not need to maintain a strict orthogonality with legacy DL NR signal.
Observation 5: For Method Type 2-M2-2, existing mechanisms can resolve or mitigate the inter-system interference between the A-IoT system and the NR system as follows:
Solution 1: The NR DL/UL signal and the A-IoT R2D/D2R signal can be transmitted using TDM.
Solution 2: The legacy NR UE and A-IoT devices can be deployed in different deployment scenarios, such as deploying the A-IoT reader/devices indoor while the NR UEs outdoor.
Solution 3: Using large guard band to mitigate the interference between A-IoT system and NR system.
Solution 4: gNB could utilize some existing mechanisms, such as using the pulse shaping filter, to minimize the interference from the R2D signal/channel to the adjacent NR channels during the transmission.
Observation 6: The reader can obtain D2R chip synchronization by detecting the rising and falling edges of the D2R CAP sequence.
Proposal 1: The additional ON-OFF as the guard period should be added at the beginning of the SIP ON/OFF pattern in order to avoid the impact of energy harvest for A-IoT charging may or may not take place immediately before the SIP as well as the additional ON-OFF can also be used for the purpose of threshold detection training.
Proposal 2: The SIP pattern Alt 2-4 should be adopted instead of SIP pattern Alt 1-2.
Proposal 3: The chip duration of CAP of R-TAS and the chip duration of PRDCH should be the same, and the reader only needs to indicate a unique R2D chip duration for both CAP of R-TAS and PRDCH.
Proposal 4: For the CAP of R-TAS, the set of M values is {2, 6, 12, 24}.
Proposal 5: The maximum duration of the CAP should be 2 OFDM symbols in order to contain the four chips of ON-OFF-ON-OFF when M equals to the minimum value of 2. 
Proposal 6: If the orthogonal method is adopted, the solution of the last 2 out of M OOK chips at the end of an OFDM symbol are always ‘OFF’ for M>12 as the extension of low voltage from the end of the SIP.
Proposal 7: Method Type 2-M2-2, which extends the legacy OFDM symbol duration without NR CP operation, should be considered for R2D signal transmission due to its lower complexity and more efficient spectrum resource utilization in Rel-20.
Proposal 8: TBS information should be used to implicitly indicate the packet size and transmission time interval and could be included in L1 R2D control information.
Proposal 9:  Joint CRC should be applied to both R2D control information and R2D data.
Proposal 10: TBS indication, which is not included in the CRC calculation, should be protected by simple error correction and error detection mechanism of simple sequence detection, such as Walsh sequences.
Proposal 11:  The D2R preamble design needs to take into consideration of performing fine frequency synchronization and clock calibration for Device 2b which may be supported in future release.
E.g., a single-tone sine wave can be transmitted before the D2R preamble for Device 2b.
Proposal 12: Confirm the working assumption made in RAN1#120bis as follows:
For short preamble/midamble where the length of the sequence is, short preamble/midamble is generated based on n=3.
Proposal 13: When D2R midamble is present and the reader explicitly indicates the formats of D2R preamble/midamble, the combination of long preamble and short midamble should not be supported.
Proposal 14: The chip duration of D2R preamble/midamble and that of PDRCH should be the same, and the reader only needs to indicate a unique D2R chip duration for both D2R preamble/midamble and PDRCH.
Proposal 15: D2R midamble interval could be indicated via D2R payload size information and D2R data rate related information in R2D control information.
Proposal 16: The device will insert one midamble every midamble interval. There is no need for the reader to explicitly indicate with one bit whether a midamble is additionally present at the end.
Proposal 17: For the reader to acquire the end of PDRCH transmission, the Option 2 should be adopted:
Option 2: Based on the corresponding R2D control information.
R1-2503833.docx
3GPP TSG RAN WG1 #121			R1-2503833
St Julian’s, Malta, May 19th – 23th, 2025

Agenda item:	9.4.3
Source: 	CMCC
Title: 	Discussion on timing acquisition and synchronization
Document for:	Discussion and Decision
Conclusions
In this contribution, we provide our views on downlink and uplink channel/signal, and the following observations and proposals are made:
Observation 1: A-IoT has a much larger coverage and lower receiver sensitivity, the output voltage of the envelop detector of a high voltage transmission may not have significant distinctions from a low voltage transmission for a coverage-edge device.
Observation 2: In case of different coverage levels, it is important that SIP can include a dynamic threshold training part for a device to set an appropriate threshold for the comparator.
Observation 3: A high sensitivity and low power consumption reference threshold detector for the comparator can be applicable for A-IoT device 1. 
Observation 4: Note that the device cannot assume the presence/absence of RF transmission prior to the SIP, and the RF signal state can be very complicated, the SIP pattern should start with a ON-OFF such that the device can set the proper threshold of the comparator regardless of RF states before SIP transmission.
Observation 5: Suppose that Alt. 1-2 can use the OFF transmission at the beginning of the OFDM symbol carrying SIP (i.e., CP part) and the subsequent ON transmission to set the reference voltage, the performance is inferior to Alt 2-4, of which the first ON transmission and OFF transmission for reference threshold setting is 11.11 us each. 
Observation 6: For Alt. 2-4, the device can simply implement rising edge detection to identify the SIP pattern. However, for Alt. 1-2, the device needs to implement both rising and falling edge detection, which overcomplicates the device implementation.
Observation 7: The proposed SIP pattern can achieve a target MDR and FAR <= 1% when CNR >= 18 dB.
Observation 8: The CAP pattern using the same M values of PRDCH can achieve a target MDR < 1% when CNR >= 18 dB even for M = 24.
Observation 9: The CAP pattern using the same M values of PRDCH can achieve a target BLER of 10% for M = 24.
Observation 10: MAC indication details of SDU length and variable parts for R2D reception is still open in RAN2, which may not be the same as how physical layer understands TBS.
Observation 11: Even if physical layer can decode TBS from indication filed in MAC, the miss decoding may lead to potential problems of R2D reception.
Observation 12: For payload size of 20 bits, when compared to the no midamble case, using preamble + midamble locating at the end of PRDCH transmission significantly improves the link performance. At 10% BLER, assuming 7 kcps, 3 dB gain is achieved using preamble + midamble when compared to no midamble case.

Proposal 1: For the pattern of SIP, support Alt. 2-4 with ON-OFF-ON-OFF transmission with a ratio of 1:1:1:3.
Proposal 2: CAP uses the same set of M values of PRDCH, i.e., M values for CAP is 2, 6, 12, 24. The OOK chip duration of CAP is the same as that of the subsequent PRDCH transmission.
Proposal 3: R2D postamble is explicitly defined to indicate the end of PRDCH transmission.
Proposal 4: The R2D postamble pattern is a duration of high voltage longer than the continuous OOK ON chips in R2D time acquisition signal and PRDCH transmissions, e.g., ON-ON-ON.
Proposal 5: For D2R midamble, the reader can explicitly indicate with one bit whether a midamble is additionally present at the end.
Proposal 6: Support the following values of interval using 3-bit indication: 256, 512, 1024, 2048, 4096, 8182, 16384, 32786.
Except for msg1 transmission, the reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information.
Proposal 7: A single long sequence and a single short sequence for D2R amble is supported.
Proposal 8: For short sequence generated based on n = 3, the following sequence generation is supported:
The generator polynomial is x3+x+1 initialized with [1 0 0];
The m-sequence is 1110100.
Proposal 9: For long sequence generated based on n = 5, the following sequence generation is supported:
The generator polynomial is x5+x2+1 initialized with [1 1 0 0 0];
The m-sequence is 1111100110100100001010111011000.

R1-2503884.docx
3GPP TSG RAN WG1 #121			R1-2503884
St Julian’s, Malta, May 19th – 23rd, 2025

Source:             Xiaomi
Title:                  Discussion on timing acquisition and synchronization for Ambient IoT
Agenda item:    9.4.3
Document for:  Decision
Conclusion
In this contribution, the following observations and proposals are provided:
Observations:
Observation 1: For the CP impact on SIP of R-TAS, it can be negligible.
Observation 2: For the CP impact on CAP of R-TAS, it is related to the exact M value.
When the M value is larger than or equal to 6, there is no impact on the timing precision of PRDCH according to the rising/falling edges of CAP.
When the M value is 2, the CP impact on the timing precision of CAP can be negligible due to the timing error is less than SFO.
Observation 3: A specific design of R2D postamble is beneficial for device to detect the ending of R2D transmission with low complexity.
Observation 4: For 32-bits X-amble(s), the D2R midamble is unnecessary when the number of bits after FEC (if FEC is applied) and repetition (if repetition is applied) is equal to or smaller than ~80.
Observation 5: For the packet size of 400bits and 32-bits x-amble(s), the midamble is essential to make an acceptable decoding performance, and 4 midambles is appropriate.
Observation 6: For the packet size of 96bits and 32-bits X-amble(s), only one midamble at the end of PDRCH is sufficient.

Proposals:
Proposal 1: For the SIP pattern of R-TAS, Alt 1-2 (single ON-OFF transmission) is preferred in which the ON-OFF duration ratio is 1:3.
Proposal 2: For CAP duration of R-TAS, the maximum duration of CAP can be 2 OFDM symbol duration, and the CAP duration becomes shorter with increasing value of M.
Proposal 3: To determine or derive the end of PRDCH transmission, Option 1 R2D postamble can be supported.
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.
Proposal 4: A recommended design of postamble includes contiguous high-level voltages longer than 2 R2D chips, e.g., 3 chips with contiguous high-level voltages.
Proposal 5:  For 32-bits X-amble(s) cases, the candidate value in terms of interval after FEC (if FEC is applied) and repetition (if repetition is applied) can be ~320.
Proposal 6:  For 8-bits X-amble(s) cases, the candidate value in terms of interval after FEC (if FEC is applied) and repetition (if repetition is applied) can be ~80.
Proposal 7:  For 8-bits or 32 bits X-amble(s) cases, a midamble is additionally present at the end when the last part of PDRCH is equal to or larger than 1/4 of interval 1.
Proposal 8: For D2R preamble/midamble, confirm the following working assumption.
Working assumption: Short preamble/midamble is generated based on n=3.
Proposal 9: D2R preamble can be a same sequence as the base sequence generated from m-sequence, where the length of the sequence is .
Proposal 10: D2R midamble can be an opposite sequence per bit as the base sequence generated from m-sequence, where the length of the sequence is .
Proposal 11: For D2R X-amble(s) determination, both candidate values in terms of interval and sequence length can be indicated via R2D control information by higher-layer signalling.

R1-2504008.Panasonic.A-IoT.Timing.Acq.and.Sync.docx
3GPP TSG RAN WG1 #121			R1-2504008
St Julian’s, Malta, 19th – 23rd May 2025

Source:	Panasonic
Title: 	A-IoT Timing Acquisition and Synchronization
Agenda Item:		9.4.3
Document for:	Discussion, Decision

Conclusion 
In this contribution, the followings proposals are made: 
Observation 1: Under the same transmission bandwidth, there is no large performance gap between chip length, i.e., different values of M, in both FAR and MDR.
Observation 2: In the case of M=6, required CNR to achieve both 1%FAR and 1%MDR is 28.3 dB.
Observation 3: In the case of M=12, required CNR to achieve both 1%FAR and 1%MDR is 27.8 dB.

Proposal 1: For the pattern of SIP of R-TAS, support Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3
Proposal 2: The end of PRDCH by the device is determined by the signalled information.
Proposal 3: Different device type does not share a transaction start from start indicator, clock acquisition part, Msg 0, Msg 1 and so on. The mechanism of "the transaction for device 1 is not triggered by the device 2a/2b" and "the transaction for device 2a/2b is not triggered by the device 1" should be supported. Whether the different device type can share the same frequency with transaction level should be concluded later.
Proposal 4: The cost, power consumption and coverage trade-off should be achieved for each of device 1 and device 2a/2b instead of too much focus on the common design among device 1/2a/2b as far as the transaction level compatibility is achieved.

R1-2504048 Discussion on timing acquisition and synchronization for Ambient IoT.docx
3GPP TSG RAN WG1 #121			R1-2504048
St Julian’s, Malta, May 19th – 23th, 2025

Agenda item:		   9.4.3
Source:	China Telecom
Title:	Discussion on timing acquisition and synchronization for Ambient IoT
Document for:		Discussion
Conclusions
In this contribution, we have the following proposals:
Proposal 1: For the pattern of SIP of R-TAS, support ON-OFF with a ratio of 1:3.
Proposal 2: Support CAP use same M values set {2, 6, 12, 24} as PRDCH.
Proposal 3: Support 2 OFDM symbol duration for maximum duration of CAP.
Proposal 4: Support specifying the R2D postamble pattern based on Manchester coding rule violation and having a distinction from SIP.
Proposal 5: The following can be considered as starting point for the candidate values in terms of the unit of interval:
Long midambles (31 bits) are advised for larger message sizes (e.g., 400 bits or 1000 bits), with potential intervals of {50 bits, 100 bits, 200 bits}.
Short midambles (7 bits) are advised for smaller message sizes (e.g., 20 bits or 96 bits), with potential intervals of {10 bits, 20 bits, 30 bits}.
Proposal 6: The reader does not need to explicitly indicate with one bit whether a midamble is additionally present at the end.
Proposal 7: The R2D control information includes at least the D2R ambles length and interval indication fields.
One bit is used to indicate the preamble length {7, 31}.
When there are m interval candidate values, log2m bits are needed to indicate the interval index.
Note: When the interval value is set to zero, there is no midamble in PDRCH transmission.

R1-2504090 Fujitsu 9.4.3.docx
3GPP TSG RAN WG1 #121	R1-2504090
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source:	Fujitsu
Title:	Discussion on timing acquisition and synchronization
Document for:	Discussion and decision.
Conclusion
In this contribution, we consider the aspects of timing acquisition and synchronization. We have the following observations and proposals:
Proposal 1: The length of SIP does not vary with the OOK M value of the following PRDCH. 
Proposal 2: The M value for CAP is the same as the M value of its following PRDCH, and the specific values of M follow the conclusion to be made in agenda 9.4.1.
No need to restrict M values for CAP to some certain values. 
Proposal 3: For the indication of the interval between consecutive ambles, the candidate values of interval between consecutive ambles are predefined.

R1-2504111.docx
3GPP TSG RAN WG1 #121	R1-2504111
Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3 - Timing acquisition and synchronization
Source:	Fraunhofer IIS, Fraunhofer HHI 
Title:	Discussion on timing acquisition and synchronization for ambient IoT
Document for:	Discussion


Conclusion
In this contribution we discussed the design aspects of the timing and synchronization signals for A-IoT. Based on the discussion in the previous sections we made the following observations and proposals:

Observation 1: Both SIP alternatives, Alt 1-2 and Alt 2-4, have similar MDR performance. 

Observation 2: Both Alt 1-2 and Alt 2-4 fall within required FAR of 1% with Alt 2-4 performing better than Alt 1-2. 

Proposal 1: For the pattern of SIP of R-TAS, support Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3. 

Proposal 2: RAN1 shall discuss and clarify the specification or knowledge of the TBS in various stages of R2D transmission. 

Proposal 3: At least for the R2D cases when there is no fixed or known TBS, the explicit specification of a R2D postamble pattern shall be discussed. 

Observation 3: Correction of timing drifts or errors, although possible during CAP, errors due to accumulation of effects such as SFO and channel propagation affect R2D performance, especially at higher chip rates and delay spreads. 

Proposal 4: Study reporting of information relating to R2D timing drift or error. 

R1-2504139 Discussion on timing acquisition and synchronization-final.docx
3GPP TSG RAN WG1 #121			R1-2504139
St Julian, Malta, May 19th – 23rd, 2025

Source:	ETRI
Title:	Discussion on timing acquisition and synchronization
Agenda item:	9.4.3
Document for:	Discussion
Conclusion
In this contribution, we have discussed the remaining issues on the aspects of timing acquisition and synchronization signals and provide following observation and proposals.

Observation 1: The actual time interval between midambles varies depending on the D2R chip duration even when the bit size for midamble interval is the same.

Proposal 1: Support Alt 1-2, an ON-OFF pattern with a ratio of 1:3, as the SIP pattern.

Proposal 2: Specify an R2D postamble pattern consisting of at least three consecutives ON chips, applicable for all M values.

Proposal 3: It is proposed to support 75 bits, 150 bits, and 300 bits as candidate values for the midamble interval, based on the D2R chip duration of 133.33 μs.

Proposal 4: It is proposed to support an explicit indication by the Reader, using one control bit, to specify whether an additional midamble is present at the end of the D2R transmission.

R1-2504207 OPPO timing_sync.docx
3GPP TSG RAN WG1 #121		R1-2504207
St Julian’s, Malta, May 19th – 23rd, 2025

Source:	OPPO 
Title:                     Discussion on timing acquisition and synchronization for A-IoT
Agenda Item:       9.4.3
Document for:	Discussion and Decision

Conclusion
In this paper, we discussed the necessity and design of preamble/mid-amble/post-amble for R2D and D2R transmission in R19 A-IoT, we have following observations and proposals:

Observation 1: Based on proper reader control the impact of RF transmission before ON-OFF SIP pattern can be simply addressed.
Observation 2: For ON-OFF-ON-OFF pattern, the last OFF part is almost equal to PRDCH chip duration when M=2, which means high FAR may appear.
Observation 3: Alt 1-2 with ON:OFF=1:3 can reach 1% MDR at 20dB SNR and also resistant to the impact of CP insertion.
Observation 4: As RAN2 has already agreed that one field is included in the MAC header for SDU length indication, there is no needed to support R2D post-amble or even physical layer control information for R2D TBS indication, the device can be aware of the end of PRDCH by decoding the MAC header in advance. 
Observation 5: There is negligible performance difference between {long preamble, long midamble} and {long preamble, short midamble}.
Proposal 1: SIP pattern should be different from other R2D transmissions.
Proposal 2: Support Alt 1-2 with ON:OFF=1:3 as SIP for Rel-19 A-IoT.
Proposal 3: The first and the last chip of CAP should not be used for the determination of OOK chip duration; for M=24, the last 2 chips in the OFDM symbol containing CAP should always be OFF-ON, and the 2 chips are to be dropped by device.
Proposal 4: Send an LS to RAN2 to inform them that RAN1 relies on the MAC header to indicates the end of R2D transmission when MAC PDU includes one MAC SDU, or multiple MAC PDU if supported by RAN2.
Proposal 5: At least 2 relatively orthogonal sequences should be supported for preamble.
Proposal 6: For n=3, {1, 0, 0,1, 1, 1, 0}, and {1, 0, 0, 1, 0, 1, 1} are supported as preamble/midamble for A-IoT.
Proposal 7: For n=5, {1, 0, 0, 0, 0, 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 0, 1, 1, 1, 0, 1, 0
}, and {1, 0, 0, 0, 0, 1, 0, 1, 0, 1, 1, 1, 0, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0} are supported as preamble/midamble for A-IoT.
Proposal 8: Support long preamble and short midamble for A-IoT D2R.
Proposal 9: Whether to append one more midamble at the end of the PDRCH is explicitly indicated by the reader.
Proposal 10: Following control information is included in R2D control information for preamble/midamble indication:

R1-2504245_LG_9.4.3_Timing acquisition and synchronization for A-IoT_final.docx
3GPP TSG RAN WG1 #121			                 R1-2504245
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	LG Electronics
Title: 	Timing acquisition and synchronization for A-IoT
Document for:	Discussion and decision
Conclusions
In this contribution, we discussed the timing acquisition and synchronization for Rel-19 Ambient IoT, we have the following proposals and observation.

Proposal #1: For the pattern of SIP of R-TAS, Alt 1-2 (ON-OFF with a ratio of 1:3) is supported.

Proposal #2: For the CAP of R-TAS, the maximum duration is 2 OFDM symbols duration.

Proposal #3: Support the OFF voltage level for CP inserted before CAP of R-TAS.
If M=6 or M=12 for PRDCH, the last chip of PRDCH of the OFDM symbol including CAP should always be ‘OFF’
If M=24 for PRDCH, the last two chips of PRDCH of the OFDM symbol including CAP should always be ‘OFF’

Proposal #4: Support R2D TBS information indication via explicit L1 R2D control information as baseline operation (Option 1)
If there are cases where the reader cannot accurately determine the TBS of PRDCH, it could be considered to transmit the R2D postamble at the end of PRDCH

Proposal #5: Confirm the following working assumption.

Proposal #6: Support D2R TBS information indication via explicit L1 R2D control information

Observation #1: It is not necessary to explicitly indicate whether to transmit the midamble at the end of PDRCH.

R1-2504320_Apple_AIoT_PHY_Signals_vfinal.docx
3GPP TSG RAN WG1 #121		             R1-2504320
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source:	Apple
Title:	On remaining timing acquisition & synchronization aspects for Ambient IoT
Document for:	Discussion/Decision
Conclusion
In this contribution, following observations/proposals have been made on R2D and D2R signals:

Observation 1: With the assumption that there may or may not be RF transmission available before the SIP, therefore for reliable detection of SIP, some threshold detection training is needed.


Proposal 1: For SIP of R-TAS, adopt Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3
Note: Duration of 1 OFDM symbol was already agreed in RAN1#120bis

Proposal 2: Overall duration of R-TAS occupies entire duration of one or more OFDM symbols rather than partial duration.

Proposal 3: Specify R2D postamble with 3 chips corresponding to the M value for PRDCH
For timeline determination, reference point can be the end of R2D postamble

Proposal 4: Joint signaling of preamble and midamble configuration is supported indicating preamble length, presence/absence of midamble and interval between midambles, e.g. via indicating the index of the table below:


R1-2504322 FL Summary#1_AI_9_4_3_v027_Ofinno_Mod3.docx
3GPP TSG RAN WG1 #121		             R1-2504322
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	Moderator (Apple)
Title:	FL Summary#1 on timing acquisition & synchronization for Ambient IoT
Document for:	Discussion & Decision

Introduction & Work-Plan for RAN1#121
This document provides the feature lead summary on the offline discussions/inputs/proposals for AI 9.4.3 timing acquisition and synchronization signals for R2D and D2R for ambient IoT WI during RAN1#121. 


Contact Information
Please consider providing your company name, your name and email address to be able to reach for any potential offline discussions/contact regarding AI 9.4.3 on timing acquisition and synchronization for ambient IoT.





Work Plan
Issues for discussion/completion in this meeting are categorized as below:
High-priority issues:
Finalize SIP pattern by down-selecting between Alt 1-2 and Alt 2-4
D2R ambles:
Confirm WA  and finalize m-sequences corresponding to n =3 and n =5
Finalize interval values for D2R midambles and signaling framework
Medium-priority issues:
Conclude whether R2D postamble is supported and specified, or not
If there is still no consensus, then the natural outcome will be R2D postamble is not specified
Low-priority issues:
CAP related aspects
I don’t intend to spend much offline time, and hopefully as needed, we can quickly agree on this part during online session


(High Priority) SIP of R-TAS







[Closed] 1st Discussion Round 
Table 2-1: Summary of views on alternatives for SIP



FL Observations:
Based on the contributions, Alt 1-2 has slightly higher majority support compared to Alt 2-4. However, in terms of simulation, 4 companies showed that Alt 2-4 performance better compared to Alt 1-2, especially in terms of MDR performance. On the other hand, 3 companies showed that Alt 1-2 performs better, especially  in terms of FAR, considering scenarios for evaluations including presence of other R2D transmissions. From FL perspective, basically, it is clear that MDR with Alt 2-4 is expected to be better than Alt 1-2 considering all scenarios and no assumption of any transmission before SIP. For FAR, mainly the issue is shown by proponents of Alt 1-2 under scenario when the last 3 OFF chips in SIP are not easily distinguishable. Based on agreed M values for PRDCH, this should not be the issue because effectively SIP with 1 OFDM symbol duration avoids that issue as it has 3 OFF chips at end with effectively M corresponding to 6. Such pattern of chips for that duration is not expected in other transmissions. Also, for M = 2 [16] shows that due to no particular assumption on any transmission before SIP, even with Alt 1-2, high FAR is shown.
Therefore, with consideration that no assumption on RF transmission before SIP is applied and at least 4 companies demonstrate via simulations that Alt 2-4 can work in all scenarios corresponding to PRDCH with all the agreed M values, following proposal is provided.

HP Proposal 2-1 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
 

Another additional aspect to clarify, based on the note in the endorsed TS by spec editor, whether/how the presence of SIP is detected need to be captured in the specification or not. Based on the contributions, only except 1 company, there is no explicit proposal to specify how the presence of SIP is detected by device. However, to further align understanding among companies, following question is drafted for your inputs.


Question 2-2 
Do you think that TS 38.291 needs to capture on how the presence of SIP is detected at the device or is it up to device’s implementation? 


(High Priority) D2R ambles 




[Closed] 1st Discussion Round 
FL observations
On Working Assumption Confirmation: Regarding the working assumption on supporting n=3 for D2R ambles, 5 companies explicitly discussed and proposed to confirm the WA, while 1 company explicitly proposed to not confirm the working assumption and rather agree on n=4. All the other companies that provided their views relayed to D2R ambles, although didn’t explicitly propose to confirm the WA, but based on the proposals, it is quite clear that they assume and consider WA to be confirmed. One company that proposes to change from n=3 to n=4 shows performance gain improvements with n=4. However, as discussed in RAN1#120bis, since n=5 is already agreed, therefore, the other value of n =3 was chosen based on reasonable performance gap, otherwise the benefit of supporting two lengths diminishes. Therefore, considering, all but one company, prefer to confirm WA, proposal 3-1 is provided. Also, only ~3 companies consider supporting different length combinations for midamble and preamble, however, majority of companies don’t see a motivation to support such a combination. Therefore, from FL perspective, we don’t need to further discuss that as it is not critical or necessary issue. 

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH



Sequence Generation: Below tables summarizes the sequences considered by companies for n=3 and n=4. In terms of exact sequences, there is almost no common sequence considered by multiple companies. However, in terms of polynomial used for sequence generation, companies mainly considered between 2 alternatives, each for n = 3 and n=4. Companies have also provided evaluations and generally all the proposed polynomials have good performance, primarily in terms of good correlation properties and peak sidelobe level. Therefore, from FL perspective, as a starting point, single polynomial for n =3 and n =4 is proposed in proposal 3-2. Furthermore, in terms of initial state, most companies did not discuss exact values, except for 3 companies. One company proposed to not fix the initial state and rather specify an association with frequency shift to allow for multiple sequences. However, considering limited time and no clear motivation without CDM, FL suggestion is to consider fixed initial state and support only single sequence for each of the n value. Therefore, for initial state, also FL’s suggestion is to adopt 1 fixed state and based on that single fixed sequence for each of n can be specified. For n =3, based on majority x³ + x² + 1 can be considered and furthermore with initial state of 010, it provides best PSL=1 among all the other sequences. Accordingly, proposal is provided. For n =5, there is equal support for the two polynomials. In terms of performance, both sequence is almost similar. For polynomial x⁵ + x³ + 1, with initial state of 01001, better PSL is achieved in comparison to initial state of 00001. Therefore, at least in case of this polynomial, initial state of 01001 is only considered for further discussion. For polynomial x⁵ + x² + 1, only initial state of 11000 is provided. Accordingly, proposal is provided with two options for further down-selection. 

Table 3-1: Summary of Sequence Generation from Companies


HP Proposal 3-2 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 0101
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Down-select one option from the two options in RAN1#121:
Option 1: 
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Option 2: 
Polynomial: x⁵ + x² + 1
Initial State: 11000
Resulting Sequence: 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 01




Midamble intervals: ~11 companies provided exact interval values; however, the candidate set of values are quite divergent. Depending on time variation in the channel and SFO/timing estimation requirement, companies justify multiple set of values. Based on the contributions, considering only time variation in the channel, interval in order of ~275 bits for a bit duration of 266.67μs is reasonable. However, considering SFO/timing estimation requirement and the maximum remaining bits after the last midamble, interval in the order of ~30 bits for length 7 of preamble/midamble seems reasonable. Therefore, considering above and two different lengths of preamble/midamble, FL’s recommendation is to at least agree on at least 4 values within the range of 25-275 bits with a gap of 75 bits. Furthermore, in order for reader to have flexibility, no specific association between length of preamble/midamble needs to be specified and leave it up to signalling as determined by reader. Based on above, proposal 3-3 is provided. 

HP Proposal 3-3 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 25 bits, 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits}
For other supported bit durations of 266.67μs/Y
I = Y * {25 bits, 100 bits, 175 bits, 225 bits}




Signaling for preamble/midamble: Regarding the signaling framework, companies have considered mainly two different methods to signal length of preamble/midamble and midamble interval. One method is joint indication of the length and midamble interval, while the other method is the separate indication, i.e. separate bitfield for length indication and separate bitfield for midamble interval. Considering the argument provided under 3) to allow more flexibility to reader and not necessarily specify certain combinations of length and corresponding midamble intervals, FL’s recommendation is to adopt separate indication for preamble/midamble length and midamble interval. Another aspect that companies discussed is whether an explicit indication for midamble presence at the end is needed or not and if needed, how to indicate it. Majority companies (~9) think that it is not needed for the reader to explicitly indicate it, while still quite some companies (~7) think that for device to easily determine the presence of midamble at the end, it can be explicitly signaling, and most preferred option is via separate 1-bit indication. From FL perspective, one key motivation to indicate midamble presence at the end is to avoid large number of bits after midamble (that is not at the end). However, in proposal 3-3, the values proposed for interval  to avoid large number of bits after midamble, therefore, such explicit indication is not really necessary. Also, in terms of generally indication the presence/absence of midamble, ~2 companies consider explicit indication. However, it is argued that if the midamble interval indicated is longer than TBS, then this is an implicit indication to the device that midamble is not inserted. Based on above, proposal 3-4 is provided.

HP Proposal 3-4 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH




(Medium Priority) R2D Postamble

[Closed] 1st Discussion Round 
Table 4-1: Summary of views on R2D postamble


FL observations
Based on above table, from FL perspective, there is almost no change in the situation since last two meetings. From that point of view, it is hard to converge one way or other. Moreover, it seems that for purpose of indicating the end of PRDCH transmission, already RAN2 agreement could be applied, as below by Vivo and Oppo:


With all the above considerations, FL proposal is to conclude that there is no consensus to specify R2D postamble. 

Proposed Conclusion 4-1 
There is no consensus to specify R2D postamble



(Low Priority) CAP related issues

[Closed] 1st Discussion Round 
FL observations
In RAN1#120bis, we agreed the CAP pattern and the agreement also included the text that it is supported for all M values corresponding to PRDCH. Based on FL understanding, we don’t necessarily need any additional agreement. However, ~10 companies discussed that in their contributions for this meeting and based on their understanding, the agreement didn’t really explicitly cover the M value for CAP. Therefore, based on the contributions, all the companies that discussed M values for CAP propose that they are same as for PRDCH. Therefore, following proposal is provided:

Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Another aspect which ~4 companies discussed is related to CP handling for CAP. Mostly, the potential issue discussed is when M=24 is applied. For this case, companies have proposed adopting CP handling based on option1 from CP handling related agreement in 9.4.1. Also, one company pointed out no special handling is needed. From FL perspective, effectively, all companies that discussed this issue don’t necessarily mean to apply special handling for CAP in comparison to PRDCH but rather suggest adoption CP handling method with option 1. Therefore, for this agenda, at this point, we don’t need to additional discuss CP handling and rather wait for the discussion to conclude in 9.4.1 If needed, based on outcome of the discussion in 9.4.1 on CP handling method, we can further consider, if any additional discussion is needed for CAP or not

Proposals for offline sessions
1st offline session (Tuesday, May 20, 2025)
TBA…




Proposals for online session
1st  online session (Monday, May 19, 2025)
HP Proposal 2-1a 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
Note: Detection method of SIP presence at the device is not specified

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Contributions in RAN1#121


Appendix
Revised WID (RP-243326): RAN1 Scope & Objectives 
General Scope
The definitions provided in TR 38.848, TR 38.769, and decisions, etc. made during the Rel-19 SI in RAN WGs are taken into this WI, and the following is the exclusive general scope:
The overall objective shall be to standardize the following Ambient IoT device:
Device 1: ~1 µW peak power consumption, has energy storage, RF envelope detector receiver, initial sampling frequency offset (SFO) up to 10X ppm, neither R2D nor D2R amplification in the device. The device’s D2R transmission is backscattered on a carrier wave provided externally.
Deployment scenario 1 with Topology 1, according to D1T1-B. 
FR1 licensed spectrum in FDD, with R2D in DL spectrum and D2R and CW in UL spectrum.
Spectrum deployment in-band to NR and standalone, with A-IoT BS located indoor.
Traffic types DO-DTT, DT, for rUC1 (indoor inventory) and rUC4 (indoor command). 
Carrier wave transmission for waveform 1 only, without hopping, per the following cases in TR 38.769:
Case 1-4 for D1T1-B
Proximity determination via Solution 1 in TR 38.769 only.
Device (un)availability via Direction 1 in TR 38.769 only.

WGs begin their discussions from the decisions already made in TR 38.769, with the following refinements for the scope: 

The following objectives are set, within the General Scope:
RAN1 scope:
PRDCH and PDRCH, which are the only physical channels in R2D and D2R, respectively.
R2D and D2R signal(s)
Multiplexing/multiple access in R2D is by only TDMA, and in D2R is by only TDMA and FDMA.
R2D supports only OOK-4 modulation, one solution for CP handling. D2R backscattering supports only OOK and BPSK modulations.
R2D transmission supports only the Manchester line code in TR 38.769
D2R transmission supports:
Either the Manchester line code in TR 38.769 or no line code (one to be down-selected); and
A corresponding small frequency shift method according to the options in TR 38.769.
R2D does not support FEC. D2R supports only convolutional code with generator polynomials as per TS 36.212. Applying or not applying the FEC to D2R is specified by ensuring it is under the reader control and applies to all devices targeted by the reader.
PRDCH and PDRCH both support transmission without CRC, and with CRC as per the generator polynomials in TS 38.212 for 6-bit CRC and 16-bit CRC. Cases to use which length of CRC, or no CRC, to be decided in RAN1.
D2R supports physical layer repetition transmission. R2D does not support physical-layer repetition transmission. 
RAN2 scope:
Specify the necessary functions and procedures for an Ambient IoT compact protocol stack and lightweight signalling procedure to enable DO-DTT and DT data transmission:
A-IoT Paging, including subsequent paging for the same service. Support the options that a paging message contains one identifier, and that a paging message contains no identifier. 
Note: RAN2 aims to design a paging message format such that multiple identifiers can be contained in one paging message, for forward compatibility purposes.
A-IoT Random access, including re-access for failure handling. Contention-based and contention-free cases are supported. For the contention-based random access, only Solution 1 (3-step only) is included.
A-IoT data transmission, including data (re-)transmission for failure handling. Segmentation is supported at least in D2R.
Only MAC layer is included
RAN3 scope: 
Specify necessary architectural aspects, and signaling and procedures between A-IoT RAN and A-IoT CN to support the A-IoT functions, assuming an architecture of aggregated gNB, including:
Inventory and command operations
Device location reporting at reader ID granularity
Note: The above A-IoT functions are supported over the existing NG interface, based on architecture(s) defined by RAN3/SA2.
RAN4 scope:
Specify RF requirements for Ambient-IoT BS, device 1, and CW
RF requirements for Type 1-C Ambient-IoT BS
RF requirements for device 1
RF requirements for CW
Specify RRM core requirements for device 1, if necessary
Study and develop OTA test methodology for A-IoT device 1
Consider test methods specified in TR 38.870 as starting point. Take test system reuse, test system complexity and test time into account, when developing test methods suitable for Ambient IoT.
Develop the preliminary Measurement Uncertainty (MU) assessment for the test system
Use band n8 as an example band

Note 1: Coordination with SA2 and SA3 is expected. Updates to the WID objectives should be considered if needed.

Note 2: This WI shall target for an IoT segment well below the existing 3GPP IoT technologies, e.g. NB-IoT, eMTC, RedCap, etc. The WI shall not aim to replace existing 3GPP LPWA technologies.

SI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#116 (Athens, Greece, February 26th – March 1st, 2024)
Agreement
At least the following time domain frame structure is studied for A-IoT R2D and D2R transmission.
For R2D transmission,
A R2D timing acquisition signal (e.g. R2D preamble) is included at least for timing acquisition and for indicating the start of the R2D transmission in time domain.
For D2R transmission,
A D2R timing acquisition signal (e.g. D2R preamble) is included at least for timing acquisition and for indicating the start of the D2R transmission in time domain.
FFS other necessary component(s), e.g. midamble, postamble, periodic sync signal, control fields, guard period


RAN1#116bis (Changsha, Hunan Province, China, April 15th – April 19th, 2024)

Agreement
To determine or derive the end of PRDCH transmission, study at least following options:  
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.       
Option 2: Based on R2D control information.

Agreement
For the reader to acquire the end of PDRCH transmission, study at least following options:  
Option 1: D2R postamble immediately follows the PDRCH
Option 2: Based on control information

Agreement
For D2R transmission, study the necessity of midamble at least for the purpose of performing timing/frequency tracking or channel estimation or interference estimation, considering at least the following: 
Modulation and Coding schemes, e.g., data modulation, line/channel coding 
Receiving methods, e.g., coherent or non-coherent
D2R transmission length/packet size
Midamble overhead
Timing/frequency accuracy
Phase accuracy

Agreement
RAN1 study the R2D transmission without midamble as the baseline if Manchester encoding is used.
FFS the necessity for the R2D transmission with midamble if PIE is used. 

Agreement
For the R2D timing acquisition signal immediately preceding the transmission of a physical channel, study a preamble with at least two parts which includes a start-indicator part and a clock-acquisition part, where the start-indicator part immediately precedes the clock-acquisition part:
Start-indicator part provides the start of the R2D transmission
FFS: Details of start-indicator part
Clock-acquisition part provides at least the chip synchronization of the subsequent physical channel transmission
FFS: Details of clock-acquisition part, e.g. structure, encoding, length, etc. 
FFS: Methods to determine chip duration of the subsequent physical channel transmission 
FFS: Other functionalities
Note: the preamble is considered not to be part of a physical channel
FFS: other part(s) of the preamble, if any 
FFS: whether the above clock acquisition is sufficient for all devices
FFS: how to make the preamble compact

Agreement
For D2R, a preamble preceding each PDRCH transmission is studied as the baseline at least for the D2R timing acquisition signal:
Preamble is not part of PDRCH
FFS: Other functionalities of the preamble

Agreement
Reference signals including at least DMRS, PTRS, CSI-RS/TRS, are not further studied for R2D.

Agreement
Reference signals including DMRS, PTRS, SRS, are not further studied for D2R
Note: This doesn’t preclude the possibility to study preamble, midamble, postamble for different purposes, e.g. channel/interference estimation and/or proximity determination


RAN1#117 (Fukuoka City, Fukuoka, Japan, May 20th – 24th, 2024)

Agreement
For the start-indicator part of the R2D time acquisition signal, study the two options below:
Option 1: ON/OFF pattern i.e. high/low voltage transmission 
Option 2: OFF pattern, i.e. low voltage transmission 

Agreement
For R2D, the clock-acquisition part of the R2D time acquisition signal is used to determine the OOK chip duration
FFS: Pattern design to support determination of chip duration


RAN1#118 (Maastricht, NL, August 19th – 23rd,  2024)

Agreement
For each D2R transmission, no separate part for start-indicator is considered for the preamble preceding the PDRCH.

Agreement
For D2R transmission, preamble preceding the PDRCH is studied also for the potential additional functionalities:
SFO estimation
CFO estimation
Channel estimation
Interference estimation
Note: this does not preclude studying the above functionalities by using a midamble and/or postamble, if supported
FFS: Other functionalities, if any

Agreement
For the start-indicator part of the R2D time acquisition signal, ON/OFF pattern i.e. high/low voltage transmission is applied
FFS: length/pattern of ON/OFF.
FFS: when TD2R_min is applicable, whether/how the start-indicator part is included in TD2R_min or not. To be discussed in 9.4.2.2


RAN1#118bis (Hefei, China, October 14th – 18th,  2024)

Agreement
The start indicator part of the R2D time acquisition signal is not included in TD2R_min.

Agreement
The TR will capture the following options, and companies are encouraged to analyze the tradeoffs among the following D2R amble(s) options:
Option 1: D2R preamble only
Option 2: D2R preamble + X midamble(s), where X 1
Option 3: D2R preamble + postamble
Option 4: D2R preamble + Y midamble(s) + postamble, where Y1
For the above options, companies are encouraged to report at least the following:
Purpose(s) of the preamble, midamble and postamble 
Whether companies assume multiple options can be supported


Agreement
For analysing the trade-offs among the D2R amble(s) options, companies can refer to the Table 3.2.4 in section 3.2.4 of R1-2408993 for information.

Agreement
For the clock-acquisition part of the R2D time acquisition signal, following is captured in the TR 38.769:
Clock-acquisition part is based on OOK without line coding and includes rising/falling edges, including at least two rising or at least two falling edges for the device to determine the OOK chip duration

Agreement
For the start-indicator part of the R2D time acquisition signal, for providing the start of the R2D transmission, following is captured in the TR 38.769:
Following options have been studied for the start-indicator part of the R2D time acquisition signal:
Option 1: ON-OFF transmission is considered based on energy/edge detection, and multiple alternatives have been studied including 
Alt 1: A single ON-OFF transmission, i.e. one high-voltage transmission followed by one low-voltage transmission, where ON and OFF may have same or different durations
Alt 2: A multi-ON-OFF transmission, where different ON and different OFF may have same or different durations and different parts may have same or different duration
Option 2: ON-OFF sequence-based design is considered which consists of a pre-defined sequence for detection of start-indicator part based on digital correlation
For both the options, it is observed that a fixed duration for the start-indicator part can be considered, regardless of the value of M used for PRDCH transmissions. 
Miss-detection ratio (MDR), false-alarm ratio (FAR) and detection complexity have been considered for the design of the R2D start indicator part by following companies
It is observed by 1 source [Huawei] that for an FAR of ~0%, the MDR of less than 1% can be achieved with Alt 2 of option 1 (considering 2 ON-OFF transmissions with different durations) and it is also observed that low-complexity and reduced power consumption can be achieved
1 source [ZTE] evaluated Alt 1 of option 1 (considering same duration for ON and OFF) and Alt 2 of option 1 (considering multiple ON-OFF transmissions with same duration) and observed that for an FAR of ~0%, the MDR of less than 1% can be achieved and Alt 1 of option 1 performs better than Alt 2 of option 1. 
1 source [CATT] observed with ON-OFF pattern, that for an FAR of ~0%, the MDR of less than 1% can be achieved with a duration of at least 1 OFDM symbol
1 source [Qualcomm] compares the performance between option 1 and option 2. It shows almost similar coverage range (SNR requirement) for target MDR of 1%. For MDR of 10%, it shows that sequence-based design provides better performance, and it is observed that during the available time, it is feasible for all devices to detect the start-indicator sequence within the power budget. It is further observed that the FAR with sequence-based design can be improved in case of interference scenarios when compared with pattern-based design. 
For both the options, it may be beneficial that the start-indicator part is distinguishable at least from other parts of the R2D transmissions

Agreement
For the clock-acquisition part of the R2D time acquisition signal for OOK chip duration determination, following options are studied:
Option 1: Duration of the clock-acquisition part is variable for different M values, i.e. the duration becomes shorter with increasing value of M
Option 2: Duration of the clock-acquisition part is constant for different M values based on repetition, i.e. repetition factor is increased with increasing value of M to keep the duration constant
FFS: Whether/what restriction on M values for the clock-acquisition part
Note: Other functionalities of clock-acquisition part is a separate discussion

Agreement
For the D2R preamble, binary signal is considered.



RAN1#119 (Orlando, US, Nov 18th – 22nd, 2024)
Agreement
Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
For coherent detection of PDRCH with a payload of 16 bits or 20 bits with 6-bit or 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code:
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, when the same amble(s) overhead is maintained, Option 3 provides comparable performance results to Option 1.
Source [7, Samsung] observed that with up to 10% SFO, ~5kbps data rate, for device 1 and with up to 1% SFO for device 2, the decoding performance with/without midamble are similar
Source [9, vivo] observed that Option 1 is sufficient to achieve 10% and 1% BLER, with no more than 8 SFO hypotheses tested at the reader side.
With up to 10% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2dB and 4 dB) for Option 1, Option 2 of D2R preamble+1midamble and Option 3.
With up to 1% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2.8dB and 3.3dB) for Option 1, Option 2 of D2R preamble+1 midamble and Option 3.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <5*10^3 ppm
With up to 10% SFO, achieving the required accuracy necessitates more than 20 SFO hypotheses at the reader side for Option 1 and 10 SFO hypotheses are sufficient for Option 3 of D2R preamble + postamble. But for Option 3 reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc. 
With up to 1% SFO, 4 SFO hypotheses are sufficient for Option 1 to achieve the required accuracy.

For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieves a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.


Agreement
For the CFO calibration signal, which is required only for device 2b to reduce the frequency offset range and the guard-bandwidth of D2R transmission, the following observations are captured in TR 38.769:
Source [3, Huawei] report that a single-tone RF signal is used as the CFO calibration signal, it is not a part of time acquisition signal and can be transmitted as an optional R2D signal after the PRDCH transmission. 
Sources [2, Ericsson], [19, Panasonic] and [20, OPPO] report that additional synchronization signal is needed. 
[OPPO] state the R2D timing acquisition signal may not be sufficient or may not be usable for CFO calibration since a reference frequency is needed when separate LOs are used for Tx and Rx in device 2b.
Sources [7, Samsung], [9, vivo], [30, Qualcomm], [36, Apple] report that additional synchronization signal is needed if the synchronization for carrier frequency using R2D signal/channel does not provide required functionalities for device 2b.
Source [5, CMCC][31, MTK] report that it may not be possible to achieve enough frequency accuracy (0.01 ppm) even after CFO calibration based on R2D time acquisition signals for coherent detection at reader especially when the D2R data rate is low.

Agreement
For device 2b, a signal for CFO calibration should be provided to synchronize / calibrate the device clock for LO for carrier frequency (Clock purpose #5) to achieve the accuracy after clock sync / calibration at device side captured in Table 5.2.3-1.
Frequency calibration at device 2b is beneficial at least to reduce the guard-bandwidth of D2R transmission.

Agreement
Adopt the updates documented in R1-2410653 for section 6.2 of the TR38.769. 

Agreement
Adopt following update to the TP agreed on Monday

Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
[omit unchanged part]
For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception. 
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.

Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieve a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc
Source [7, Samsung] observes that the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception.

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Source [37, MediaTek] reports that transmitting 96-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 1000 ppm, and transmitting 1000-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 100 ppm.
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.

Agreement
Following observations on R2D clock-acquisition part are captured in TR 38.769:
On impact/restriction of M values for the clock-acquisition part
9 sources [TCL, Nokia, Huawei, CMCC, ZTE, Apple, CATT, Mediatek, Qualcomm] provided observations on the impact/restriction of M values for the clock-acquisition part design requirements:
1 source [Nokia] observed that increasing value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length and use of   provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration. 
2 sources [TCL, Huawei] observed for option 1 of the clock-acquisition part design that no restriction is required to be placed on the M values. Furthermore, 1 source [Huawei] observed that the same 2 ON-OFF voltage (with the same duration) satisfies the FDR performance metric of less than 1% for different M values, e.g., M = 2, 6 and 24, where FDR is the False detection ratio (FDR), i.e. incorrectly calculating M, is the performance metric.
1 source [CMCC] observed that pattern of the clock-acquisition part is related to M chips per OFDM symbol and when M is small, the clock-acquisition part may cross multiple OFDM symbols, and the CP insertion may degrade the timing acquisition performance.
1 source [ZTE] observed that with option 2, the duration of the clock-acquisition part remains consistent across all M values, at least three OFDM symbols maybe required for clock-acquisition part and it maybe not as efficient as option1
1 source [Apple] observed that among the two options studied for the clock-acquisition part, option 2 provides increased robustness, especially in case of large value of M, when compared to option 1 and potentially increase the detection performance of the clock-acquisition part. 
1 source [CATT] observed that if the chip duration is variable based on the M value used for OOK-4 waveform, the detection performance would be limited by the received SINR of the CAP with clear transition of the rising and falling edges.
1 source [Qualcomm] observed that the option 1 with M>1 has shorter duration of clock acquisition part than M=1 and worse timing acquisition accuracy. At least part of PRDCH following the clock acquisition part may need to be used to improve the timing acquisition. Furthermore, the larger M (e.g., M>4) with small chip duration is more sensitive to the SFO accuracy and the restriction of M for the clock acquisition part may be needed.
1 source [Mediatek] further observed that different M values may impact the chip accuracy obtained by the clock acquisition part.

On impact of CP insertion/handling on the clock-acquisition part
10 sources [TCL, CMCC, ZTE, Samsung, Vivo, CATT, NTT Docomo, Qualcomm, Mediatek, Spreadtrum] observed that the CP insertion/handling may impact the design requirements of the clock-acquisition part:
1 source [CMCC] further observed that when the clock-acquisition part occupies more than one OFDM symbol, ON-OFF state transition around CP can avoid the error rising or falling edges due to the CP insertion.
1 source [ZTE] further observed that to mitigate the impact of the CP in the clock-acquisition part for large M values, it can reuse the CP handling method for PRDCH 
1 source [Samsung] further observed that CP insertion/handling on the clock-acquisition part can cause false rising/falling transition and, therefore, the clock acquisition part should be designed such that it does not incur a false rising or falling edges due to CP insertion when CP-OFDM is used for OOK signal generation.
1 source [vivo] further observed that CP insertion/handling on the clock acquisition part will impact the chip duration estimation accuracy. It is further observed that for CP handling, device may not be able to count the clock and estimate OFDM symbol duration accurately until the clock acquisition part if the start indicator only includes a single ON-OFF transmission. 
1 source [CATT] further observed that the SER will be degraded due to uneven chip interval when the CP is inserted within an OFDM symbol, where SER refers to the number of samples which is mismatched for comparing to the total number of samples in a chip.
1 source [NTT Docomo] further observed if CP insertion would cause false rising/falling edges, accuracy of timing acquisition may be impacted.   
1 source [Mediatek] further observed that the issues of chip extension, false raising/falling transition, and additional raising/falling transition caused by CP insertion/handling considering different M values will impact the chip accuracy obtained by the clock acquisition part.
1 source [Spreadtrum] further observed that the design of clock acquisition part should consider that CP insertion does not cause a false rising or falling edges and does not cause different length of multiple high / low voltages within the clock acquisition part when the clock acquisition spans multiple OFDM symbols.
1 source [Huawei] observed CP insertion/handling may not impact the design requirements of the clock-acquisition part

Agreement
For the D2R preamble design, following aspects have been studied and can be captured in the TR 38.769:
Autocorrelation Property
10 sources [Nokia, Huawei, CMCC, Xiaomi, CATT, Oppo, Ericsson, NTT Docomo, Qualcomm, ZTE] observed that the signal should have good autocorrelation properties for accurate peak detection based on the signal correlation at the reader 
Cross-correlation Property
7 sources [Nokia, CMCC, Oppo, Ericsson, Qualcomm, ZTE, CATT] observed that the signal should have good cross-correlation properties if multiple D2R preamble sequences are considered (e.g. for multiple access schemes (if supported) for D2R transmissions). 
Line coding
1 source [Nokia] observed that line coding may impact the autocorrelation property of the sequence. 
1 source [Huawei] observed that for D2R preamble, to apply backscattering, line coding can help improve the detection performance based on shifting the D2R signal’s frequency location away from the carrier wave
Sequence Types (not limited to below types only)
M-sequence
3 sources [Nokia, Vivo, Xiaomi] observed that m-sequence can be considered for D2R preamble mainly owing to good correlation properties.  
Golay sequence
4 sources [CMCC, Vivo, Xiaomi, Samsung] observed that Golay sequence can be considered for D2R preamble mainly owing to good correlation properties and availability of large number of distinct sequences and complementary pairs.  
Walsh sequence
1 source [Oppo] observed that Walsh sequence can be considered as a candidate for D2R preamble thanks to its good auto/cross-correlation property and flexible length
General Observations
1 source [Huawei] observed can achieve 0.97% residual SFO with 98% probability under -2.5dB SNR and 0.1% MDR with [-1/8, 1/8] chip timing error with 99.05% probability under -2.5dB SNR with D2R preamble including 2-parts with clock-like sampling frequency signal and timing-acquisition signal, having 32-length ‘1’ sequence (encoded to 64-chip Manchester code) and 32-length sequence (encoded to 64-chip Manchester code), respectively.
4 sources [TCL, CMCC, ZTE, Vivo] observed that for D2R preamble with binary signal, the timing synchronization performance is highly related to the sequence length of the preamble. Furthermore, 1 source [CMCC] observed that to achieve a BLER performance at 10%, the timing synchronization error should be less than 10%. Furthermore, 1 source [ZTE] observed that the channel estimation performance is also highly related to sequence length. 1 source [ZTE] observed that using a 32 bits preamble provides ~8 dB, ~5 dB performance gain than using 8 bits, 16 bits preamble, respectively. And using a 64 bits preamble provides ~2.5dB performance gain than using a 32 bits preamble.
1 source [Ericsson] observed that for D2R preamble with binary signal, normalized SFO estimation error of less than 10% can be achieved with a training sequence length 64 or longer. The simulated D2R preamble consisting of a Golay complementary pair can tolerate SFO up to 1% (AWGN) with up to 1 dB loss in performance for a sufficiently long preamble sequence length (32 or greater).

Agreement
For determining the end of PRDCH at the device, following two options are studied and captured in the TR 38.769:
Option 1: TBS information (via implicit/explicit L1 R2D control information)
Option 2: Postamble (at the end of PRDCH) 
14 sources [Nokia, Huawei, ZTE, CMCC, Samsung, Ericsson, Oppo, LGE, Qualcomm, Spreadtrum, Mediatek, Cewit, Ericsson, vivo] provided following observations on the above two options for determining the end of PRDCH:
3 sources [Nokia, Huawei, ZTE] observed that option 2 provide two benefits, namely, the variable payload length and to provide timing acquisition before the subsequent transmission of either PDRCH or PRDCH, thus improving the detectability at both reader and the device, respectively. Furthermore, 1 source [Huawei] observed that R2D postamble indicates the TBS with high efficiency for small packets by avoiding a large padding overhead, unlike option 1, which may require devices to perform blind detection of different PRDCH formats (if supported) and the overhead caused by the inclusion of a R2D postamble does not exceed 20% for even the smallest of message sizes and may be less than the signaling overhead caused by using a dedicated TBS indicator
1 source [CMCC] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead, while for large payload size with more bits, the resource overhead of postamble is smaller.
1 source [vivo] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead.
1 source [Samsung] observed option 2 is not strictly required, however, given the possible clock drift at a device, it may be still beneficial to also attach postamble at least for the determination of the end of PRDCH at a device. 
3 sources [Oppo, Spreadtrum, CEWiT] observed that with option 2, the false detection may be higher for shorter postamble. Source [OPPO[ observed that in contrast to option 2, it is more reliable and efficient to indicate TBS with control information in option 1
2 sources [LGE, vivo] observed that if a message type or a command ID is included in L1 control information and implicitly indicates a known size of a fixed TB, then there is no need for either option 1 or option 2
2 sources [Qualcomm, vivo] observed that option 1 has the advantages of avoiding blind detection of postamble and providing the power saving for non-target devices to skip the R2D detection.
1 source [MediaTek] observed that option 1 is feasible for the device to avoid the unnecessary reception of a TB with a specific size and thus enable power saving, e.g., when the TB has a size exceeding the allowance of the device remaining power.
1 source [Ericsson] observed option 2 is not strictly required if the end of PRDCH can be explicitly indicated by R2D control information, and it is subject to the miss-detection rate. It may be beneficial if a PRDCH postamble can serve as an additional timing acquisition signal prior to a PDRCH transmission.

Agreement
For D2R scheduling, midamble (if supported) related information can be explicitly/implicitly indicated via corresponding PRDCH.

Agreement
Following observations on R2D clock-acquisition part are additionally captured in TR 38.769:
On purpose of SFO estimation/correction based on the clock-acquisition part
3 sources [Nokia, CATT, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Nokia] observed that the length of preamble sequence may need to consider also the robustness against SFO
1 source [CATT] observed that device 2a/2b may require higher synchronization accuracy for signal transmission or backscattering and therefore, the design of CAP may be required to accommodate the requirement of additional frequency synchronization and clock calibration for Device 2a/2b. 
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for SFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support SFO correction.
On purpose of CFO estimation/correction based on the clock-acquisition part
2 sources [Ericsson, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Ericsson] observes that the clock-acquisition part can be utilized to solve the frequency synchronization problem without impacting the time-domain sequence, for example by transmitting in some frequency resources and it can be a harmonized solution for both chip duration indication and device frequency synchronization. However, it is further observed that if the time interval between an R2D transmission and the corresponding D2R transmission and if the device loses the timing obtained from the R2D timing acquisition signal due to timing drift at the time for the D2R transmission, then an additional synchronization signal is needed
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for CFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support CFO correction.


WI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#120 (Athens, Greece, Feb 17th – 21st, 2025)
SIP related Agreements
Agreement
For the SIP of R-TAS, for providing the start of the R2D transmission, one single design based on Option 1 is supported and further down-selection to be done among Alt 1 and Alt 2 :
Option 1: ON-OFF transmission with following alternatives:
Alt 1: A single ON-OFF transmission with pre-defined duration for each of the ON-OFF, where ON and OFF may have same or different durations
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt1
Alt 2: A multi-ON-OFF transmission with pre-defined duration for each of the ON(s)-OFF(s), where different ON and different OFF may have same or different durations and different parts may have same or different duration
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt2
Only a single fixed value for entire duration of SIP of R-TAS is supported, which is independent of the value of “M” used in CAP and PRDCH
Note: Specific design and duration for SIP of R-TAS are further discussed, and companies are encouraged to evaluate the designs in terms of target MDR of [10%] for a FAR up to [1%] and at least following assumptions are used:
MDR refers to the probability that SIP is not detected when it was actually transmitted
FAR probability that the receiver incorrectly detects SIP when SIP was not transmitted
Energy/edge detection-based method is the baseline assumption for evaluation purpose
Continue discussion on necessary details for simulation assumptions

Agreement
For the SIP of R-TAS, down-select among the following candidates:
Alt 1 (Single ON-OFF transmission)
Alt 1-1: ON followed by OFF with same duration for both
Alt 1-2: ON followed by OFF with a duration ratio of 1:[2,3]
Alt 1-3: ON followed by OFF with a duration ratio of [2,3]:1
Alt 2 (Multi-ON-OFF transmission)
Alt 2-1: A number of repetition instances of Alt 1-1 or Alt 1-2 or Alt 1-3
Alt 2-2: ON-OFF-ON (duration of ON and OFF can be different)
Alt 2-3: OFF-ON-OFF (duration of ON and OFF can be different)
Alt 2-4: Combination of single instance of Alt 1-1 and single instance of Alt 1-2
For the evaluation purpose, for both options, candidate values related to duration are considered:
Entire duration of SIP: 1/2 OFDM symbol duration or 1 OFDM symbol duration (including clarifying whether OFDM symbol duration includes CP); additional durations can be considered and reported by companies with justification 
Companies to report the exact duration(s) for ON or OFF
Companies are encouraged to report at least the following details for the evaluations:
Baseline assumption is that RF transmission is not present; companies can report other consideration
For FAR calculation, whether noise and/or PRDCH transmission is considered
Details on threshold detection method including whether/how threshold detection training is used based on the proposed design alternative or not
BW assumptions for RF-ED and BB-LPF
Target MDR of up to 1% for FAR of up to [1%, 10%]

CAP related Agreements
Agreement
For the CAP of R-TAS, the starting chip has a different voltage level compared to the end of the SIP of R-TAS.

Agreement
For the design of the CAP of R-TAS, at least 2 transition edges in same direction are included, i.e. at least two transitions from “OFF” chip to “ON” chip or two transitions from “ON” chip to “OFF” chip.

Agreement
For the CAP of R-TAS:
Candidate values for maximum duration of CAP to be further down-selected to one value from : 1.5 OFDM symbol duration, 2 OFDM symbol duration, 3 OFDM symbol duration
For option 1 for CAP of R-TAS from TR 38.769, maximum duration is applicable to minimum value of M to be supported, and the CAP duration becomes shorter with increasing value of M
FFS: whether the number of ON/OFF transmissions in the CAP is fixed or not fixed
For option 2 for CAP of R-TAS from TR 38.769, maximum duration is the only (constant) duration that is applicable for all the M values to be supported
Down-selection between option 1 and option 2 for CAP of R-TAS from TR 38.769 by RAN1#120-bis
FFS: Values of M to be supported


R2D Midamble related Agreement
Agreement
R2D transmission does not include a midamble.

D2R X-amables related Agreement
Agreement
For D2R preamble design, the functionalities of timing acquisition, SFO estimation/time tracking and channel estimation should be supported
For D2R midamble design, the functionalities of SFO estimation/time tracking and channel estimation should be supported
D2R midamble can be transmitted at the end of the PDRCH transmission. If it is at the end, it is not designed for being used for indicating the end of PDRCH transmission
FFS: condition(s) and/or indication where the D2R midamble is present or not

Agreement
For D2R x-ambles:
Following is considered as the types for base sequence and to be further down-selected:
Option 1: M-sequence 
Option 2: Golay sequence
Note: Above doesn’t preclude an additional part for preamble, e.g. with ON and/or OFF transmission, if needed/supported
FFS: Whether/what multiple sequences (using same base sequence type) are supported
Note: This in no way implies that there is going to be CDMA between D2R x-ambles
For evaluation purpose, companies are encouraged to consider following:
Performance at least in terms of autocorrelation/cross-correlation property, SFO estimation/Timing accuracy, SNR for target PDRCH BLER of [1%, 10%]
Report presence and time-domain resource(s) x-ambles
Report sequence type(s) and length(s) for x-ambles
Following format can be considered for reporting the evaluation results



RAN1#120bis (Wuhan, China, April 7th – 11th, 2025)
R-TAS related Agreements (including SIP and CAP)

Agreement
For the pattern of SIP of R-TAS, only the following 2 alternatives are considered for further down-selection:
Alt 1-2: ON-OFF with a ratio of 1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration
Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration

Agreement
For CAP of R-TAS, following is adopted:
Option 1 for CAP of R-TAS from TR 38.769 is adopted where the CAP duration becomes proportionally shorter with increasing value of M, i.e. if for , duration is  OFDM symbol long, then for , duration is  OFDM symbol long
Note: Duration without CP insertion is considered above, with CP insertion, the total duration may not be exactly proportional
Only following two alternatives for CAP pattern are considered for further down-selection to one alternative:
Alt 1: ON-OFF-ON-OFF
Alt 2: ON-OFF-ON


Agreement
For R-TAS, SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

D2R x-ambles related Agreements (including preamble and midamble)

Agreement
For D2R midamble, for determining the presence and location of midamble(s) at the device:
Reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information
FFS: details of signalling
FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end
Note: This does not preclude the support of having no midamble present in the D2R transmission

Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH

Agreement
For indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following is adopted:
Unit of interval is number of bits after FEC (if FEC is applied) and repetition (if repetition is applied)
FFS: the candidate values in terms of the unit of interval
TDoc file conclusion not found
R1-2504323 FL Summary#2_AI_9_4_3.docx
3GPP TSG RAN WG1 #121		             R1-2504323
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	Moderator (Apple)
Title:	FL Summary#2 on timing acquisition & synchronization for Ambient IoT
Document for:	Discussion & Decision

Introduction & Work-Plan for RAN1#121
This document provides the feature lead summary on the offline discussions/inputs/proposals for AI 9.4.3 timing acquisition and synchronization signals for R2D and D2R for ambient IoT WI during RAN1#121. 


Contact Information
Please consider providing your company name, your name and email address to be able to reach for any potential offline discussions/contact regarding AI 9.4.3 on timing acquisition and synchronization for ambient IoT.





Work Plan
Issues for discussion/completion in this meeting are categorized as below:
High-priority issues:
Finalize SIP pattern by down-selecting between Alt 1-2 and Alt 2-4
D2R ambles:
Confirm WA  and finalize m-sequences corresponding to n =3 and n =5
Finalize interval values for D2R midambles and signaling framework
Medium-priority issues:
Conclude whether R2D postamble is supported and specified, or not
If there is still no consensus, then the natural outcome will be R2D postamble is not specified
Low-priority issues:
CAP related aspects
I don’t intend to spend much offline time, and hopefully as needed, we can quickly agree on this part during online session


SIP of R-TAS







[Closed] 1st Discussion Round 
Table 2-1: Summary of views on alternatives for SIP



FL Observations:
Based on the contributions, Alt 1-2 has slightly higher majority support compared to Alt 2-4. However, in terms of simulation, 4 companies showed that Alt 2-4 performance better compared to Alt 1-2, especially in terms of MDR performance. On the other hand, 3 companies showed that Alt 1-2 performs better, especially  in terms of FAR, considering scenarios for evaluations including presence of other R2D transmissions. From FL perspective, basically, it is clear that MDR with Alt 2-4 is expected to be better than Alt 1-2 considering all scenarios and no assumption of any transmission before SIP. For FAR, mainly the issue is shown by proponents of Alt 1-2 under scenario when the last 3 OFF chips in SIP are not easily distinguishable. Based on agreed M values for PRDCH, this should not be the issue because effectively SIP with 1 OFDM symbol duration avoids that issue as it has 3 OFF chips at end with effectively M corresponding to 6. Such pattern of chips for that duration is not expected in other transmissions. Also, for M = 2 [16] shows that due to no particular assumption on any transmission before SIP, even with Alt 1-2, high FAR is shown.
Therefore, with consideration that no assumption on RF transmission before SIP is applied and at least 4 companies demonstrate via simulations that Alt 2-4 can work in all scenarios corresponding to PRDCH with all the agreed M values, following proposal is provided.

HP Proposal 2-1 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
 

Another additional aspect to clarify, based on the note in the endorsed TS by spec editor, whether/how the presence of SIP is detected need to be captured in the specification or not. Based on the contributions, only except 1 company, there is no explicit proposal to specify how the presence of SIP is detected by device. However, to further align understanding among companies, following question is drafted for your inputs.


Question 2-2 
Do you think that TS 38.291 needs to capture on how the presence of SIP is detected at the device or is it up to device’s implementation? 







[Closed] 2nd Discussion Round 
Regarding the SIP Pattern, at this stage, I don’t believe that reiterating known arguments will help move the discussion forward. Therefore, I’d like to request companies to only respond if they cannot live with a particular alternative. There is no need to restate preferences, as those are already well understood.

Question 2-2v1 
Do you have strong objections to either Alt 1–2 or Alt 2–4, such that you cannot accept it under any circumstances?


D2R ambles 





[Closed] 1st Discussion Round 
FL observations
On Working Assumption Confirmation: Regarding the working assumption on supporting n=3 for D2R ambles, 5 companies explicitly discussed and proposed to confirm the WA, while 1 company explicitly proposed to not confirm the working assumption and rather agree on n=4. All the other companies that provided their views relayed to D2R ambles, although didn’t explicitly propose to confirm the WA, but based on the proposals, it is quite clear that they assume and consider WA to be confirmed. One company that proposes to change from n=3 to n=4 shows performance gain improvements with n=4. However, as discussed in RAN1#120bis, since n=5 is already agreed, therefore, the other value of n =3 was chosen based on reasonable performance gap, otherwise the benefit of supporting two lengths diminishes. Therefore, considering, all but one company, prefer to confirm WA, proposal 3-1 is provided. Also, only ~3 companies consider supporting different length combinations for midamble and preamble, however, majority of companies don’t see a motivation to support such a combination. Therefore, from FL perspective, we don’t need to further discuss that as it is not critical or necessary issue. 

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH



Sequence Generation: Below tables summarizes the sequences considered by companies for n=3 and n=4. In terms of exact sequences, there is almost no common sequence considered by multiple companies. However, in terms of polynomial used for sequence generation, companies mainly considered between 2 alternatives, each for n = 3 and n=4. Companies have also provided evaluations and generally all the proposed polynomials have good performance, primarily in terms of good correlation properties and peak sidelobe level. Therefore, from FL perspective, as a starting point, single polynomial for n =3 and n =4 is proposed in proposal 3-2. Furthermore, in terms of initial state, most companies did not discuss exact values, except for 3 companies. One company proposed to not fix the initial state and rather specify an association with frequency shift to allow for multiple sequences. However, considering limited time and no clear motivation without CDM, FL suggestion is to consider fixed initial state and support only single sequence for each of the n value. Therefore, for initial state, also FL’s suggestion is to adopt 1 fixed state and based on that single fixed sequence for each of n can be specified. For n =3, based on majority x³ + x² + 1 can be considered and furthermore with initial state of 010, it provides best PSL=1 among all the other sequences. Accordingly, proposal is provided. For n =5, there is equal support for the two polynomials. In terms of performance, both sequence is almost similar. For polynomial x⁵ + x³ + 1, with initial state of 01001, better PSL is achieved in comparison to initial state of 00001. Therefore, at least in case of this polynomial, initial state of 01001 is only considered for further discussion. For polynomial x⁵ + x² + 1, only initial state of 11000 is provided. Accordingly, proposal is provided with two options for further down-selection. 

Table 3-1: Summary of Sequence Generation from Companies


HP Proposal 3-2 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 0101
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Down-select one option from the two options in RAN1#121:
Option 1: 
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Option 2: 
Polynomial: x⁵ + x² + 1
Initial State: 11000
Resulting Sequence: 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 01




Midamble intervals: ~11 companies provided exact interval values; however, the candidate set of values are quite divergent. Depending on time variation in the channel and SFO/timing estimation requirement, companies justify multiple set of values. Based on the contributions, considering only time variation in the channel, interval in order of ~275 bits for a bit duration of 266.67μs is reasonable. However, considering SFO/timing estimation requirement and the maximum remaining bits after the last midamble, interval in the order of ~30 bits for length 7 of preamble/midamble seems reasonable. Therefore, considering above and two different lengths of preamble/midamble, FL’s recommendation is to at least agree on at least 4 values within the range of 25-275 bits with a gap of 75 bits. Furthermore, in order for reader to have flexibility, no specific association between length of preamble/midamble needs to be specified and leave it up to signalling as determined by reader. Based on above, proposal 3-3 is provided. 

HP Proposal 3-3 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 25 bits, 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits}
For other supported bit durations of 266.67μs/Y
I = Y * {25 bits, 100 bits, 175 bits, 225 bits}




Signaling for preamble/midamble: Regarding the signaling framework, companies have considered mainly two different methods to signal length of preamble/midamble and midamble interval. One method is joint indication of the length and midamble interval, while the other method is the separate indication, i.e. separate bitfield for length indication and separate bitfield for midamble interval. Considering the argument provided under 3) to allow more flexibility to reader and not necessarily specify certain combinations of length and corresponding midamble intervals, FL’s recommendation is to adopt separate indication for preamble/midamble length and midamble interval. Another aspect that companies discussed is whether an explicit indication for midamble presence at the end is needed or not and if needed, how to indicate it. Majority companies (~9) think that it is not needed for the reader to explicitly indicate it, while still quite some companies (~7) think that for device to easily determine the presence of midamble at the end, it can be explicitly signaling, and most preferred option is via separate 1-bit indication. From FL perspective, one key motivation to indicate midamble presence at the end is to avoid large number of bits after midamble (that is not at the end). However, in proposal 3-3, the values proposed for interval  to avoid large number of bits after midamble, therefore, such explicit indication is not really necessary. Also, in terms of generally indication the presence/absence of midamble, ~2 companies consider explicit indication. However, it is argued that if the midamble interval indicated is longer than TBS, then this is an implicit indication to the device that midamble is not inserted. Based on above, proposal 3-4 is provided.

HP Proposal 3-4 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Closed] 2nd Discussion Round 
Based on inputs from 1st round, proposals for D2R ambles are update accordingly below:
Proposal 3-2A 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 010
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1







Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}





Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH


R2D Postamble

[Closed] 1st Discussion Round 
Table 4-1: Summary of views on R2D postamble


FL observations
Based on above table, from FL perspective, there is almost no change in the situation since last two meetings. From that point of view, it is hard to converge one way or other. Moreover, it seems that for purpose of indicating the end of PRDCH transmission, already RAN2 agreement could be applied, as below by Vivo and Oppo:


With all the above considerations, FL proposal is to conclude that there is no consensus to specify R2D postamble. 

Proposed Conclusion 4-1 
There is no consensus to specify R2D postamble



[Closed] 2nd Discussion Round 

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips



CAP related issues

[Closed] 1st Discussion Round 
FL observations
In RAN1#120bis, we agreed the CAP pattern and the agreement also included the text that it is supported for all M values corresponding to PRDCH. Based on FL understanding, we don’t necessarily need any additional agreement. However, ~10 companies discussed that in their contributions for this meeting and based on their understanding, the agreement didn’t really explicitly cover the M value for CAP. Therefore, based on the contributions, all the companies that discussed M values for CAP propose that they are same as for PRDCH. Therefore, following proposal is provided:

Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Another aspect which ~4 companies discussed is related to CP handling for CAP. Mostly, the potential issue discussed is when M=24 is applied. For this case, companies have proposed adopting CP handling based on option1 from CP handling related agreement in 9.4.1. Also, one company pointed out no special handling is needed. From FL perspective, effectively, all companies that discussed this issue don’t necessarily mean to apply special handling for CAP in comparison to PRDCH but rather suggest adoption CP handling method with option 1. Therefore, for this agenda, at this point, we don’t need to additional discuss CP handling and rather wait for the discussion to conclude in 9.4.1 If needed, based on outcome of the discussion in 9.4.1 on CP handling method, we can further consider, if any additional discussion is needed for CAP or not














Proposals for offline sessions
1st offline session (Tuesday, May 20, 2025)

Proposal 2-3 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
M value for the variable part chips is up to reader implementation
Note: Detection method of SIP presence at the device is not specified












Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 or 1 0 0 1 1 1 0
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}



Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips





Proposals for online session
1st  online session (Monday, May 19, 2025)
HP Proposal 2-1a 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
Note: Detection method of SIP presence at the device is not specified


HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 













2nd online session (Tuesday, May 20, 2025)
Proposal 2-3A 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified


Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 (for 0101 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}





Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF] chips



Contributions in RAN1#121


Appendix
Revised WID (RP-243326): RAN1 Scope & Objectives 
General Scope
The definitions provided in TR 38.848, TR 38.769, and decisions, etc. made during the Rel-19 SI in RAN WGs are taken into this WI, and the following is the exclusive general scope:
The overall objective shall be to standardize the following Ambient IoT device:
Device 1: ~1 µW peak power consumption, has energy storage, RF envelope detector receiver, initial sampling frequency offset (SFO) up to 10X ppm, neither R2D nor D2R amplification in the device. The device’s D2R transmission is backscattered on a carrier wave provided externally.
Deployment scenario 1 with Topology 1, according to D1T1-B. 
FR1 licensed spectrum in FDD, with R2D in DL spectrum and D2R and CW in UL spectrum.
Spectrum deployment in-band to NR and standalone, with A-IoT BS located indoor.
Traffic types DO-DTT, DT, for rUC1 (indoor inventory) and rUC4 (indoor command). 
Carrier wave transmission for waveform 1 only, without hopping, per the following cases in TR 38.769:
Case 1-4 for D1T1-B
Proximity determination via Solution 1 in TR 38.769 only.
Device (un)availability via Direction 1 in TR 38.769 only.

WGs begin their discussions from the decisions already made in TR 38.769, with the following refinements for the scope: 

The following objectives are set, within the General Scope:
RAN1 scope:
PRDCH and PDRCH, which are the only physical channels in R2D and D2R, respectively.
R2D and D2R signal(s)
Multiplexing/multiple access in R2D is by only TDMA, and in D2R is by only TDMA and FDMA.
R2D supports only OOK-4 modulation, one solution for CP handling. D2R backscattering supports only OOK and BPSK modulations.
R2D transmission supports only the Manchester line code in TR 38.769
D2R transmission supports:
Either the Manchester line code in TR 38.769 or no line code (one to be down-selected); and
A corresponding small frequency shift method according to the options in TR 38.769.
R2D does not support FEC. D2R supports only convolutional code with generator polynomials as per TS 36.212. Applying or not applying the FEC to D2R is specified by ensuring it is under the reader control and applies to all devices targeted by the reader.
PRDCH and PDRCH both support transmission without CRC, and with CRC as per the generator polynomials in TS 38.212 for 6-bit CRC and 16-bit CRC. Cases to use which length of CRC, or no CRC, to be decided in RAN1.
D2R supports physical layer repetition transmission. R2D does not support physical-layer repetition transmission. 
RAN2 scope:
Specify the necessary functions and procedures for an Ambient IoT compact protocol stack and lightweight signalling procedure to enable DO-DTT and DT data transmission:
A-IoT Paging, including subsequent paging for the same service. Support the options that a paging message contains one identifier, and that a paging message contains no identifier. 
Note: RAN2 aims to design a paging message format such that multiple identifiers can be contained in one paging message, for forward compatibility purposes.
A-IoT Random access, including re-access for failure handling. Contention-based and contention-free cases are supported. For the contention-based random access, only Solution 1 (3-step only) is included.
A-IoT data transmission, including data (re-)transmission for failure handling. Segmentation is supported at least in D2R.
Only MAC layer is included
RAN3 scope: 
Specify necessary architectural aspects, and signaling and procedures between A-IoT RAN and A-IoT CN to support the A-IoT functions, assuming an architecture of aggregated gNB, including:
Inventory and command operations
Device location reporting at reader ID granularity
Note: The above A-IoT functions are supported over the existing NG interface, based on architecture(s) defined by RAN3/SA2.
RAN4 scope:
Specify RF requirements for Ambient-IoT BS, device 1, and CW
RF requirements for Type 1-C Ambient-IoT BS
RF requirements for device 1
RF requirements for CW
Specify RRM core requirements for device 1, if necessary
Study and develop OTA test methodology for A-IoT device 1
Consider test methods specified in TR 38.870 as starting point. Take test system reuse, test system complexity and test time into account, when developing test methods suitable for Ambient IoT.
Develop the preliminary Measurement Uncertainty (MU) assessment for the test system
Use band n8 as an example band

Note 1: Coordination with SA2 and SA3 is expected. Updates to the WID objectives should be considered if needed.

Note 2: This WI shall target for an IoT segment well below the existing 3GPP IoT technologies, e.g. NB-IoT, eMTC, RedCap, etc. The WI shall not aim to replace existing 3GPP LPWA technologies.

SI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#116 (Athens, Greece, February 26th – March 1st, 2024)
Agreement
At least the following time domain frame structure is studied for A-IoT R2D and D2R transmission.
For R2D transmission,
A R2D timing acquisition signal (e.g. R2D preamble) is included at least for timing acquisition and for indicating the start of the R2D transmission in time domain.
For D2R transmission,
A D2R timing acquisition signal (e.g. D2R preamble) is included at least for timing acquisition and for indicating the start of the D2R transmission in time domain.
FFS other necessary component(s), e.g. midamble, postamble, periodic sync signal, control fields, guard period


RAN1#116bis (Changsha, Hunan Province, China, April 15th – April 19th, 2024)

Agreement
To determine or derive the end of PRDCH transmission, study at least following options:  
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.       
Option 2: Based on R2D control information.

Agreement
For the reader to acquire the end of PDRCH transmission, study at least following options:  
Option 1: D2R postamble immediately follows the PDRCH
Option 2: Based on control information

Agreement
For D2R transmission, study the necessity of midamble at least for the purpose of performing timing/frequency tracking or channel estimation or interference estimation, considering at least the following: 
Modulation and Coding schemes, e.g., data modulation, line/channel coding 
Receiving methods, e.g., coherent or non-coherent
D2R transmission length/packet size
Midamble overhead
Timing/frequency accuracy
Phase accuracy

Agreement
RAN1 study the R2D transmission without midamble as the baseline if Manchester encoding is used.
FFS the necessity for the R2D transmission with midamble if PIE is used. 

Agreement
For the R2D timing acquisition signal immediately preceding the transmission of a physical channel, study a preamble with at least two parts which includes a start-indicator part and a clock-acquisition part, where the start-indicator part immediately precedes the clock-acquisition part:
Start-indicator part provides the start of the R2D transmission
FFS: Details of start-indicator part
Clock-acquisition part provides at least the chip synchronization of the subsequent physical channel transmission
FFS: Details of clock-acquisition part, e.g. structure, encoding, length, etc. 
FFS: Methods to determine chip duration of the subsequent physical channel transmission 
FFS: Other functionalities
Note: the preamble is considered not to be part of a physical channel
FFS: other part(s) of the preamble, if any 
FFS: whether the above clock acquisition is sufficient for all devices
FFS: how to make the preamble compact

Agreement
For D2R, a preamble preceding each PDRCH transmission is studied as the baseline at least for the D2R timing acquisition signal:
Preamble is not part of PDRCH
FFS: Other functionalities of the preamble

Agreement
Reference signals including at least DMRS, PTRS, CSI-RS/TRS, are not further studied for R2D.

Agreement
Reference signals including DMRS, PTRS, SRS, are not further studied for D2R
Note: This doesn’t preclude the possibility to study preamble, midamble, postamble for different purposes, e.g. channel/interference estimation and/or proximity determination


RAN1#117 (Fukuoka City, Fukuoka, Japan, May 20th – 24th, 2024)

Agreement
For the start-indicator part of the R2D time acquisition signal, study the two options below:
Option 1: ON/OFF pattern i.e. high/low voltage transmission 
Option 2: OFF pattern, i.e. low voltage transmission 

Agreement
For R2D, the clock-acquisition part of the R2D time acquisition signal is used to determine the OOK chip duration
FFS: Pattern design to support determination of chip duration


RAN1#118 (Maastricht, NL, August 19th – 23rd,  2024)

Agreement
For each D2R transmission, no separate part for start-indicator is considered for the preamble preceding the PDRCH.

Agreement
For D2R transmission, preamble preceding the PDRCH is studied also for the potential additional functionalities:
SFO estimation
CFO estimation
Channel estimation
Interference estimation
Note: this does not preclude studying the above functionalities by using a midamble and/or postamble, if supported
FFS: Other functionalities, if any

Agreement
For the start-indicator part of the R2D time acquisition signal, ON/OFF pattern i.e. high/low voltage transmission is applied
FFS: length/pattern of ON/OFF.
FFS: when TD2R_min is applicable, whether/how the start-indicator part is included in TD2R_min or not. To be discussed in 9.4.2.2


RAN1#118bis (Hefei, China, October 14th – 18th,  2024)

Agreement
The start indicator part of the R2D time acquisition signal is not included in TD2R_min.

Agreement
The TR will capture the following options, and companies are encouraged to analyze the tradeoffs among the following D2R amble(s) options:
Option 1: D2R preamble only
Option 2: D2R preamble + X midamble(s), where X 1
Option 3: D2R preamble + postamble
Option 4: D2R preamble + Y midamble(s) + postamble, where Y1
For the above options, companies are encouraged to report at least the following:
Purpose(s) of the preamble, midamble and postamble 
Whether companies assume multiple options can be supported


Agreement
For analysing the trade-offs among the D2R amble(s) options, companies can refer to the Table 3.2.4 in section 3.2.4 of R1-2408993 for information.

Agreement
For the clock-acquisition part of the R2D time acquisition signal, following is captured in the TR 38.769:
Clock-acquisition part is based on OOK without line coding and includes rising/falling edges, including at least two rising or at least two falling edges for the device to determine the OOK chip duration

Agreement
For the start-indicator part of the R2D time acquisition signal, for providing the start of the R2D transmission, following is captured in the TR 38.769:
Following options have been studied for the start-indicator part of the R2D time acquisition signal:
Option 1: ON-OFF transmission is considered based on energy/edge detection, and multiple alternatives have been studied including 
Alt 1: A single ON-OFF transmission, i.e. one high-voltage transmission followed by one low-voltage transmission, where ON and OFF may have same or different durations
Alt 2: A multi-ON-OFF transmission, where different ON and different OFF may have same or different durations and different parts may have same or different duration
Option 2: ON-OFF sequence-based design is considered which consists of a pre-defined sequence for detection of start-indicator part based on digital correlation
For both the options, it is observed that a fixed duration for the start-indicator part can be considered, regardless of the value of M used for PRDCH transmissions. 
Miss-detection ratio (MDR), false-alarm ratio (FAR) and detection complexity have been considered for the design of the R2D start indicator part by following companies
It is observed by 1 source [Huawei] that for an FAR of ~0%, the MDR of less than 1% can be achieved with Alt 2 of option 1 (considering 2 ON-OFF transmissions with different durations) and it is also observed that low-complexity and reduced power consumption can be achieved
1 source [ZTE] evaluated Alt 1 of option 1 (considering same duration for ON and OFF) and Alt 2 of option 1 (considering multiple ON-OFF transmissions with same duration) and observed that for an FAR of ~0%, the MDR of less than 1% can be achieved and Alt 1 of option 1 performs better than Alt 2 of option 1. 
1 source [CATT] observed with ON-OFF pattern, that for an FAR of ~0%, the MDR of less than 1% can be achieved with a duration of at least 1 OFDM symbol
1 source [Qualcomm] compares the performance between option 1 and option 2. It shows almost similar coverage range (SNR requirement) for target MDR of 1%. For MDR of 10%, it shows that sequence-based design provides better performance, and it is observed that during the available time, it is feasible for all devices to detect the start-indicator sequence within the power budget. It is further observed that the FAR with sequence-based design can be improved in case of interference scenarios when compared with pattern-based design. 
For both the options, it may be beneficial that the start-indicator part is distinguishable at least from other parts of the R2D transmissions

Agreement
For the clock-acquisition part of the R2D time acquisition signal for OOK chip duration determination, following options are studied:
Option 1: Duration of the clock-acquisition part is variable for different M values, i.e. the duration becomes shorter with increasing value of M
Option 2: Duration of the clock-acquisition part is constant for different M values based on repetition, i.e. repetition factor is increased with increasing value of M to keep the duration constant
FFS: Whether/what restriction on M values for the clock-acquisition part
Note: Other functionalities of clock-acquisition part is a separate discussion

Agreement
For the D2R preamble, binary signal is considered.



RAN1#119 (Orlando, US, Nov 18th – 22nd, 2024)
Agreement
Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
For coherent detection of PDRCH with a payload of 16 bits or 20 bits with 6-bit or 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code:
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, when the same amble(s) overhead is maintained, Option 3 provides comparable performance results to Option 1.
Source [7, Samsung] observed that with up to 10% SFO, ~5kbps data rate, for device 1 and with up to 1% SFO for device 2, the decoding performance with/without midamble are similar
Source [9, vivo] observed that Option 1 is sufficient to achieve 10% and 1% BLER, with no more than 8 SFO hypotheses tested at the reader side.
With up to 10% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2dB and 4 dB) for Option 1, Option 2 of D2R preamble+1midamble and Option 3.
With up to 1% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2.8dB and 3.3dB) for Option 1, Option 2 of D2R preamble+1 midamble and Option 3.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <5*10^3 ppm
With up to 10% SFO, achieving the required accuracy necessitates more than 20 SFO hypotheses at the reader side for Option 1 and 10 SFO hypotheses are sufficient for Option 3 of D2R preamble + postamble. But for Option 3 reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc. 
With up to 1% SFO, 4 SFO hypotheses are sufficient for Option 1 to achieve the required accuracy.

For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieves a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.


Agreement
For the CFO calibration signal, which is required only for device 2b to reduce the frequency offset range and the guard-bandwidth of D2R transmission, the following observations are captured in TR 38.769:
Source [3, Huawei] report that a single-tone RF signal is used as the CFO calibration signal, it is not a part of time acquisition signal and can be transmitted as an optional R2D signal after the PRDCH transmission. 
Sources [2, Ericsson], [19, Panasonic] and [20, OPPO] report that additional synchronization signal is needed. 
[OPPO] state the R2D timing acquisition signal may not be sufficient or may not be usable for CFO calibration since a reference frequency is needed when separate LOs are used for Tx and Rx in device 2b.
Sources [7, Samsung], [9, vivo], [30, Qualcomm], [36, Apple] report that additional synchronization signal is needed if the synchronization for carrier frequency using R2D signal/channel does not provide required functionalities for device 2b.
Source [5, CMCC][31, MTK] report that it may not be possible to achieve enough frequency accuracy (0.01 ppm) even after CFO calibration based on R2D time acquisition signals for coherent detection at reader especially when the D2R data rate is low.

Agreement
For device 2b, a signal for CFO calibration should be provided to synchronize / calibrate the device clock for LO for carrier frequency (Clock purpose #5) to achieve the accuracy after clock sync / calibration at device side captured in Table 5.2.3-1.
Frequency calibration at device 2b is beneficial at least to reduce the guard-bandwidth of D2R transmission.

Agreement
Adopt the updates documented in R1-2410653 for section 6.2 of the TR38.769. 

Agreement
Adopt following update to the TP agreed on Monday

Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
[omit unchanged part]
For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception. 
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.

Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieve a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc
Source [7, Samsung] observes that the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception.

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Source [37, MediaTek] reports that transmitting 96-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 1000 ppm, and transmitting 1000-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 100 ppm.
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.

Agreement
Following observations on R2D clock-acquisition part are captured in TR 38.769:
On impact/restriction of M values for the clock-acquisition part
9 sources [TCL, Nokia, Huawei, CMCC, ZTE, Apple, CATT, Mediatek, Qualcomm] provided observations on the impact/restriction of M values for the clock-acquisition part design requirements:
1 source [Nokia] observed that increasing value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length and use of   provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration. 
2 sources [TCL, Huawei] observed for option 1 of the clock-acquisition part design that no restriction is required to be placed on the M values. Furthermore, 1 source [Huawei] observed that the same 2 ON-OFF voltage (with the same duration) satisfies the FDR performance metric of less than 1% for different M values, e.g., M = 2, 6 and 24, where FDR is the False detection ratio (FDR), i.e. incorrectly calculating M, is the performance metric.
1 source [CMCC] observed that pattern of the clock-acquisition part is related to M chips per OFDM symbol and when M is small, the clock-acquisition part may cross multiple OFDM symbols, and the CP insertion may degrade the timing acquisition performance.
1 source [ZTE] observed that with option 2, the duration of the clock-acquisition part remains consistent across all M values, at least three OFDM symbols maybe required for clock-acquisition part and it maybe not as efficient as option1
1 source [Apple] observed that among the two options studied for the clock-acquisition part, option 2 provides increased robustness, especially in case of large value of M, when compared to option 1 and potentially increase the detection performance of the clock-acquisition part. 
1 source [CATT] observed that if the chip duration is variable based on the M value used for OOK-4 waveform, the detection performance would be limited by the received SINR of the CAP with clear transition of the rising and falling edges.
1 source [Qualcomm] observed that the option 1 with M>1 has shorter duration of clock acquisition part than M=1 and worse timing acquisition accuracy. At least part of PRDCH following the clock acquisition part may need to be used to improve the timing acquisition. Furthermore, the larger M (e.g., M>4) with small chip duration is more sensitive to the SFO accuracy and the restriction of M for the clock acquisition part may be needed.
1 source [Mediatek] further observed that different M values may impact the chip accuracy obtained by the clock acquisition part.

On impact of CP insertion/handling on the clock-acquisition part
10 sources [TCL, CMCC, ZTE, Samsung, Vivo, CATT, NTT Docomo, Qualcomm, Mediatek, Spreadtrum] observed that the CP insertion/handling may impact the design requirements of the clock-acquisition part:
1 source [CMCC] further observed that when the clock-acquisition part occupies more than one OFDM symbol, ON-OFF state transition around CP can avoid the error rising or falling edges due to the CP insertion.
1 source [ZTE] further observed that to mitigate the impact of the CP in the clock-acquisition part for large M values, it can reuse the CP handling method for PRDCH 
1 source [Samsung] further observed that CP insertion/handling on the clock-acquisition part can cause false rising/falling transition and, therefore, the clock acquisition part should be designed such that it does not incur a false rising or falling edges due to CP insertion when CP-OFDM is used for OOK signal generation.
1 source [vivo] further observed that CP insertion/handling on the clock acquisition part will impact the chip duration estimation accuracy. It is further observed that for CP handling, device may not be able to count the clock and estimate OFDM symbol duration accurately until the clock acquisition part if the start indicator only includes a single ON-OFF transmission. 
1 source [CATT] further observed that the SER will be degraded due to uneven chip interval when the CP is inserted within an OFDM symbol, where SER refers to the number of samples which is mismatched for comparing to the total number of samples in a chip.
1 source [NTT Docomo] further observed if CP insertion would cause false rising/falling edges, accuracy of timing acquisition may be impacted.   
1 source [Mediatek] further observed that the issues of chip extension, false raising/falling transition, and additional raising/falling transition caused by CP insertion/handling considering different M values will impact the chip accuracy obtained by the clock acquisition part.
1 source [Spreadtrum] further observed that the design of clock acquisition part should consider that CP insertion does not cause a false rising or falling edges and does not cause different length of multiple high / low voltages within the clock acquisition part when the clock acquisition spans multiple OFDM symbols.
1 source [Huawei] observed CP insertion/handling may not impact the design requirements of the clock-acquisition part

Agreement
For the D2R preamble design, following aspects have been studied and can be captured in the TR 38.769:
Autocorrelation Property
10 sources [Nokia, Huawei, CMCC, Xiaomi, CATT, Oppo, Ericsson, NTT Docomo, Qualcomm, ZTE] observed that the signal should have good autocorrelation properties for accurate peak detection based on the signal correlation at the reader 
Cross-correlation Property
7 sources [Nokia, CMCC, Oppo, Ericsson, Qualcomm, ZTE, CATT] observed that the signal should have good cross-correlation properties if multiple D2R preamble sequences are considered (e.g. for multiple access schemes (if supported) for D2R transmissions). 
Line coding
1 source [Nokia] observed that line coding may impact the autocorrelation property of the sequence. 
1 source [Huawei] observed that for D2R preamble, to apply backscattering, line coding can help improve the detection performance based on shifting the D2R signal’s frequency location away from the carrier wave
Sequence Types (not limited to below types only)
M-sequence
3 sources [Nokia, Vivo, Xiaomi] observed that m-sequence can be considered for D2R preamble mainly owing to good correlation properties.  
Golay sequence
4 sources [CMCC, Vivo, Xiaomi, Samsung] observed that Golay sequence can be considered for D2R preamble mainly owing to good correlation properties and availability of large number of distinct sequences and complementary pairs.  
Walsh sequence
1 source [Oppo] observed that Walsh sequence can be considered as a candidate for D2R preamble thanks to its good auto/cross-correlation property and flexible length
General Observations
1 source [Huawei] observed can achieve 0.97% residual SFO with 98% probability under -2.5dB SNR and 0.1% MDR with [-1/8, 1/8] chip timing error with 99.05% probability under -2.5dB SNR with D2R preamble including 2-parts with clock-like sampling frequency signal and timing-acquisition signal, having 32-length ‘1’ sequence (encoded to 64-chip Manchester code) and 32-length sequence (encoded to 64-chip Manchester code), respectively.
4 sources [TCL, CMCC, ZTE, Vivo] observed that for D2R preamble with binary signal, the timing synchronization performance is highly related to the sequence length of the preamble. Furthermore, 1 source [CMCC] observed that to achieve a BLER performance at 10%, the timing synchronization error should be less than 10%. Furthermore, 1 source [ZTE] observed that the channel estimation performance is also highly related to sequence length. 1 source [ZTE] observed that using a 32 bits preamble provides ~8 dB, ~5 dB performance gain than using 8 bits, 16 bits preamble, respectively. And using a 64 bits preamble provides ~2.5dB performance gain than using a 32 bits preamble.
1 source [Ericsson] observed that for D2R preamble with binary signal, normalized SFO estimation error of less than 10% can be achieved with a training sequence length 64 or longer. The simulated D2R preamble consisting of a Golay complementary pair can tolerate SFO up to 1% (AWGN) with up to 1 dB loss in performance for a sufficiently long preamble sequence length (32 or greater).

Agreement
For determining the end of PRDCH at the device, following two options are studied and captured in the TR 38.769:
Option 1: TBS information (via implicit/explicit L1 R2D control information)
Option 2: Postamble (at the end of PRDCH) 
14 sources [Nokia, Huawei, ZTE, CMCC, Samsung, Ericsson, Oppo, LGE, Qualcomm, Spreadtrum, Mediatek, Cewit, Ericsson, vivo] provided following observations on the above two options for determining the end of PRDCH:
3 sources [Nokia, Huawei, ZTE] observed that option 2 provide two benefits, namely, the variable payload length and to provide timing acquisition before the subsequent transmission of either PDRCH or PRDCH, thus improving the detectability at both reader and the device, respectively. Furthermore, 1 source [Huawei] observed that R2D postamble indicates the TBS with high efficiency for small packets by avoiding a large padding overhead, unlike option 1, which may require devices to perform blind detection of different PRDCH formats (if supported) and the overhead caused by the inclusion of a R2D postamble does not exceed 20% for even the smallest of message sizes and may be less than the signaling overhead caused by using a dedicated TBS indicator
1 source [CMCC] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead, while for large payload size with more bits, the resource overhead of postamble is smaller.
1 source [vivo] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead.
1 source [Samsung] observed option 2 is not strictly required, however, given the possible clock drift at a device, it may be still beneficial to also attach postamble at least for the determination of the end of PRDCH at a device. 
3 sources [Oppo, Spreadtrum, CEWiT] observed that with option 2, the false detection may be higher for shorter postamble. Source [OPPO[ observed that in contrast to option 2, it is more reliable and efficient to indicate TBS with control information in option 1
2 sources [LGE, vivo] observed that if a message type or a command ID is included in L1 control information and implicitly indicates a known size of a fixed TB, then there is no need for either option 1 or option 2
2 sources [Qualcomm, vivo] observed that option 1 has the advantages of avoiding blind detection of postamble and providing the power saving for non-target devices to skip the R2D detection.
1 source [MediaTek] observed that option 1 is feasible for the device to avoid the unnecessary reception of a TB with a specific size and thus enable power saving, e.g., when the TB has a size exceeding the allowance of the device remaining power.
1 source [Ericsson] observed option 2 is not strictly required if the end of PRDCH can be explicitly indicated by R2D control information, and it is subject to the miss-detection rate. It may be beneficial if a PRDCH postamble can serve as an additional timing acquisition signal prior to a PDRCH transmission.

Agreement
For D2R scheduling, midamble (if supported) related information can be explicitly/implicitly indicated via corresponding PRDCH.

Agreement
Following observations on R2D clock-acquisition part are additionally captured in TR 38.769:
On purpose of SFO estimation/correction based on the clock-acquisition part
3 sources [Nokia, CATT, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Nokia] observed that the length of preamble sequence may need to consider also the robustness against SFO
1 source [CATT] observed that device 2a/2b may require higher synchronization accuracy for signal transmission or backscattering and therefore, the design of CAP may be required to accommodate the requirement of additional frequency synchronization and clock calibration for Device 2a/2b. 
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for SFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support SFO correction.
On purpose of CFO estimation/correction based on the clock-acquisition part
2 sources [Ericsson, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Ericsson] observes that the clock-acquisition part can be utilized to solve the frequency synchronization problem without impacting the time-domain sequence, for example by transmitting in some frequency resources and it can be a harmonized solution for both chip duration indication and device frequency synchronization. However, it is further observed that if the time interval between an R2D transmission and the corresponding D2R transmission and if the device loses the timing obtained from the R2D timing acquisition signal due to timing drift at the time for the D2R transmission, then an additional synchronization signal is needed
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for CFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support CFO correction.


WI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#120 (Athens, Greece, Feb 17th – 21st, 2025)
SIP related Agreements
Agreement
For the SIP of R-TAS, for providing the start of the R2D transmission, one single design based on Option 1 is supported and further down-selection to be done among Alt 1 and Alt 2 :
Option 1: ON-OFF transmission with following alternatives:
Alt 1: A single ON-OFF transmission with pre-defined duration for each of the ON-OFF, where ON and OFF may have same or different durations
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt1
Alt 2: A multi-ON-OFF transmission with pre-defined duration for each of the ON(s)-OFF(s), where different ON and different OFF may have same or different durations and different parts may have same or different duration
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt2
Only a single fixed value for entire duration of SIP of R-TAS is supported, which is independent of the value of “M” used in CAP and PRDCH
Note: Specific design and duration for SIP of R-TAS are further discussed, and companies are encouraged to evaluate the designs in terms of target MDR of [10%] for a FAR up to [1%] and at least following assumptions are used:
MDR refers to the probability that SIP is not detected when it was actually transmitted
FAR probability that the receiver incorrectly detects SIP when SIP was not transmitted
Energy/edge detection-based method is the baseline assumption for evaluation purpose
Continue discussion on necessary details for simulation assumptions

Agreement
For the SIP of R-TAS, down-select among the following candidates:
Alt 1 (Single ON-OFF transmission)
Alt 1-1: ON followed by OFF with same duration for both
Alt 1-2: ON followed by OFF with a duration ratio of 1:[2,3]
Alt 1-3: ON followed by OFF with a duration ratio of [2,3]:1
Alt 2 (Multi-ON-OFF transmission)
Alt 2-1: A number of repetition instances of Alt 1-1 or Alt 1-2 or Alt 1-3
Alt 2-2: ON-OFF-ON (duration of ON and OFF can be different)
Alt 2-3: OFF-ON-OFF (duration of ON and OFF can be different)
Alt 2-4: Combination of single instance of Alt 1-1 and single instance of Alt 1-2
For the evaluation purpose, for both options, candidate values related to duration are considered:
Entire duration of SIP: 1/2 OFDM symbol duration or 1 OFDM symbol duration (including clarifying whether OFDM symbol duration includes CP); additional durations can be considered and reported by companies with justification 
Companies to report the exact duration(s) for ON or OFF
Companies are encouraged to report at least the following details for the evaluations:
Baseline assumption is that RF transmission is not present; companies can report other consideration
For FAR calculation, whether noise and/or PRDCH transmission is considered
Details on threshold detection method including whether/how threshold detection training is used based on the proposed design alternative or not
BW assumptions for RF-ED and BB-LPF
Target MDR of up to 1% for FAR of up to [1%, 10%]

CAP related Agreements
Agreement
For the CAP of R-TAS, the starting chip has a different voltage level compared to the end of the SIP of R-TAS.

Agreement
For the design of the CAP of R-TAS, at least 2 transition edges in same direction are included, i.e. at least two transitions from “OFF” chip to “ON” chip or two transitions from “ON” chip to “OFF” chip.

Agreement
For the CAP of R-TAS:
Candidate values for maximum duration of CAP to be further down-selected to one value from : 1.5 OFDM symbol duration, 2 OFDM symbol duration, 3 OFDM symbol duration
For option 1 for CAP of R-TAS from TR 38.769, maximum duration is applicable to minimum value of M to be supported, and the CAP duration becomes shorter with increasing value of M
FFS: whether the number of ON/OFF transmissions in the CAP is fixed or not fixed
For option 2 for CAP of R-TAS from TR 38.769, maximum duration is the only (constant) duration that is applicable for all the M values to be supported
Down-selection between option 1 and option 2 for CAP of R-TAS from TR 38.769 by RAN1#120-bis
FFS: Values of M to be supported


R2D Midamble related Agreement
Agreement
R2D transmission does not include a midamble.

D2R X-amables related Agreement
Agreement
For D2R preamble design, the functionalities of timing acquisition, SFO estimation/time tracking and channel estimation should be supported
For D2R midamble design, the functionalities of SFO estimation/time tracking and channel estimation should be supported
D2R midamble can be transmitted at the end of the PDRCH transmission. If it is at the end, it is not designed for being used for indicating the end of PDRCH transmission
FFS: condition(s) and/or indication where the D2R midamble is present or not

Agreement
For D2R x-ambles:
Following is considered as the types for base sequence and to be further down-selected:
Option 1: M-sequence 
Option 2: Golay sequence
Note: Above doesn’t preclude an additional part for preamble, e.g. with ON and/or OFF transmission, if needed/supported
FFS: Whether/what multiple sequences (using same base sequence type) are supported
Note: This in no way implies that there is going to be CDMA between D2R x-ambles
For evaluation purpose, companies are encouraged to consider following:
Performance at least in terms of autocorrelation/cross-correlation property, SFO estimation/Timing accuracy, SNR for target PDRCH BLER of [1%, 10%]
Report presence and time-domain resource(s) x-ambles
Report sequence type(s) and length(s) for x-ambles
Following format can be considered for reporting the evaluation results



RAN1#120bis (Wuhan, China, April 7th – 11th, 2025)
R-TAS related Agreements (including SIP and CAP)

Agreement
For the pattern of SIP of R-TAS, only the following 2 alternatives are considered for further down-selection:
Alt 1-2: ON-OFF with a ratio of 1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration
Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration

Agreement
For CAP of R-TAS, following is adopted:
Option 1 for CAP of R-TAS from TR 38.769 is adopted where the CAP duration becomes proportionally shorter with increasing value of M, i.e. if for , duration is  OFDM symbol long, then for , duration is  OFDM symbol long
Note: Duration without CP insertion is considered above, with CP insertion, the total duration may not be exactly proportional
Only following two alternatives for CAP pattern are considered for further down-selection to one alternative:
Alt 1: ON-OFF-ON-OFF
Alt 2: ON-OFF-ON


Agreement
For R-TAS, SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

D2R x-ambles related Agreements (including preamble and midamble)

Agreement
For D2R midamble, for determining the presence and location of midamble(s) at the device:
Reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information
FFS: details of signalling
FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end
Note: This does not preclude the support of having no midamble present in the D2R transmission

Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH

Agreement
For indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following is adopted:
Unit of interval is number of bits after FEC (if FEC is applied) and repetition (if repetition is applied)
FFS: the candidate values in terms of the unit of interval

RAN1#121 (St Julian’s, Malta, May 19th  – 23rd , 2025)
Agreement
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Agreement
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission.
TDoc file conclusion not found
R1-2504324 FL Summary#3_AI_9_4_3.docx
3GPP TSG RAN WG1 #121		             R1-2504324
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	Moderator (Apple)
Title:	FL Summary#3 on timing acquisition & synchronization for Ambient IoT
Document for:	Discussion & Decision

Introduction & Work-Plan for RAN1#121
This document provides the feature lead summary on the offline discussions/inputs/proposals for AI 9.4.3 timing acquisition and synchronization signals for R2D and D2R for ambient IoT WI during RAN1#121. 


Contact Information
Please consider providing your company name, your name and email address to be able to reach for any potential offline discussions/contact regarding AI 9.4.3 on timing acquisition and synchronization for ambient IoT.





Work Plan
Issues for discussion/completion in this meeting are categorized as below:
High-priority issues:
Finalize SIP pattern by down-selecting between Alt 1-2 and Alt 2-4
D2R ambles:
Confirm WA  and finalize m-sequences corresponding to n =3 and n =5
Finalize interval values for D2R midambles and signaling framework
Medium-priority issues:
Conclude whether R2D postamble is supported and specified, or not
If there is still no consensus, then the natural outcome will be R2D postamble is not specified
Low-priority issues:
CAP related aspects
I don’t intend to spend much offline time, and hopefully as needed, we can quickly agree on this part during online session


SIP of R-TAS







[Closed] 1st Discussion Round 
Table 2-1: Summary of views on alternatives for SIP



FL Observations:
Based on the contributions, Alt 1-2 has slightly higher majority support compared to Alt 2-4. However, in terms of simulation, 4 companies showed that Alt 2-4 performance better compared to Alt 1-2, especially in terms of MDR performance. On the other hand, 3 companies showed that Alt 1-2 performs better, especially  in terms of FAR, considering scenarios for evaluations including presence of other R2D transmissions. From FL perspective, basically, it is clear that MDR with Alt 2-4 is expected to be better than Alt 1-2 considering all scenarios and no assumption of any transmission before SIP. For FAR, mainly the issue is shown by proponents of Alt 1-2 under scenario when the last 3 OFF chips in SIP are not easily distinguishable. Based on agreed M values for PRDCH, this should not be the issue because effectively SIP with 1 OFDM symbol duration avoids that issue as it has 3 OFF chips at end with effectively M corresponding to 6. Such pattern of chips for that duration is not expected in other transmissions. Also, for M = 2 [16] shows that due to no particular assumption on any transmission before SIP, even with Alt 1-2, high FAR is shown.
Therefore, with consideration that no assumption on RF transmission before SIP is applied and at least 4 companies demonstrate via simulations that Alt 2-4 can work in all scenarios corresponding to PRDCH with all the agreed M values, following proposal is provided.

HP Proposal 2-1 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
 

Another additional aspect to clarify, based on the note in the endorsed TS by spec editor, whether/how the presence of SIP is detected need to be captured in the specification or not. Based on the contributions, only except 1 company, there is no explicit proposal to specify how the presence of SIP is detected by device. However, to further align understanding among companies, following question is drafted for your inputs.


Question 2-2 
Do you think that TS 38.291 needs to capture on how the presence of SIP is detected at the device or is it up to device’s implementation? 







[Closed] 2nd Discussion Round 
Regarding the SIP Pattern, at this stage, I don’t believe that reiterating known arguments will help move the discussion forward. Therefore, I’d like to request companies to only respond if they cannot live with a particular alternative. There is no need to restate preferences, as those are already well understood.

Question 2-2v1 
Do you have strong objections to either Alt 1–2 or Alt 2–4, such that you cannot accept it under any circumstances?


[Closed] 3rd Discussion Round 
Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified




Proposal 2-3C 
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.


D2R ambles 





[Closed] 1st Discussion Round 
FL observations
On Working Assumption Confirmation: Regarding the working assumption on supporting n=3 for D2R ambles, 5 companies explicitly discussed and proposed to confirm the WA, while 1 company explicitly proposed to not confirm the working assumption and rather agree on n=4. All the other companies that provided their views relayed to D2R ambles, although didn’t explicitly propose to confirm the WA, but based on the proposals, it is quite clear that they assume and consider WA to be confirmed. One company that proposes to change from n=3 to n=4 shows performance gain improvements with n=4. However, as discussed in RAN1#120bis, since n=5 is already agreed, therefore, the other value of n =3 was chosen based on reasonable performance gap, otherwise the benefit of supporting two lengths diminishes. Therefore, considering, all but one company, prefer to confirm WA, proposal 3-1 is provided. Also, only ~3 companies consider supporting different length combinations for midamble and preamble, however, majority of companies don’t see a motivation to support such a combination. Therefore, from FL perspective, we don’t need to further discuss that as it is not critical or necessary issue. 

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH



Sequence Generation: Below tables summarizes the sequences considered by companies for n=3 and n=4. In terms of exact sequences, there is almost no common sequence considered by multiple companies. However, in terms of polynomial used for sequence generation, companies mainly considered between 2 alternatives, each for n = 3 and n=4. Companies have also provided evaluations and generally all the proposed polynomials have good performance, primarily in terms of good correlation properties and peak sidelobe level. Therefore, from FL perspective, as a starting point, single polynomial for n =3 and n =4 is proposed in proposal 3-2. Furthermore, in terms of initial state, most companies did not discuss exact values, except for 3 companies. One company proposed to not fix the initial state and rather specify an association with frequency shift to allow for multiple sequences. However, considering limited time and no clear motivation without CDM, FL suggestion is to consider fixed initial state and support only single sequence for each of the n value. Therefore, for initial state, also FL’s suggestion is to adopt 1 fixed state and based on that single fixed sequence for each of n can be specified. For n =3, based on majority x³ + x² + 1 can be considered and furthermore with initial state of 010, it provides best PSL=1 among all the other sequences. Accordingly, proposal is provided. For n =5, there is equal support for the two polynomials. In terms of performance, both sequence is almost similar. For polynomial x⁵ + x³ + 1, with initial state of 01001, better PSL is achieved in comparison to initial state of 00001. Therefore, at least in case of this polynomial, initial state of 01001 is only considered for further discussion. For polynomial x⁵ + x² + 1, only initial state of 11000 is provided. Accordingly, proposal is provided with two options for further down-selection. 

Table 3-1: Summary of Sequence Generation from Companies


HP Proposal 3-2 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 0101
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Down-select one option from the two options in RAN1#121:
Option 1: 
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Option 2: 
Polynomial: x⁵ + x² + 1
Initial State: 11000
Resulting Sequence: 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 01




Midamble intervals: ~11 companies provided exact interval values; however, the candidate set of values are quite divergent. Depending on time variation in the channel and SFO/timing estimation requirement, companies justify multiple set of values. Based on the contributions, considering only time variation in the channel, interval in order of ~275 bits for a bit duration of 266.67μs is reasonable. However, considering SFO/timing estimation requirement and the maximum remaining bits after the last midamble, interval in the order of ~30 bits for length 7 of preamble/midamble seems reasonable. Therefore, considering above and two different lengths of preamble/midamble, FL’s recommendation is to at least agree on at least 4 values within the range of 25-275 bits with a gap of 75 bits. Furthermore, in order for reader to have flexibility, no specific association between length of preamble/midamble needs to be specified and leave it up to signalling as determined by reader. Based on above, proposal 3-3 is provided. 

HP Proposal 3-3 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 25 bits, 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits}
For other supported bit durations of 266.67μs/Y
I = Y * {25 bits, 100 bits, 175 bits, 225 bits}




Signaling for preamble/midamble: Regarding the signaling framework, companies have considered mainly two different methods to signal length of preamble/midamble and midamble interval. One method is joint indication of the length and midamble interval, while the other method is the separate indication, i.e. separate bitfield for length indication and separate bitfield for midamble interval. Considering the argument provided under 3) to allow more flexibility to reader and not necessarily specify certain combinations of length and corresponding midamble intervals, FL’s recommendation is to adopt separate indication for preamble/midamble length and midamble interval. Another aspect that companies discussed is whether an explicit indication for midamble presence at the end is needed or not and if needed, how to indicate it. Majority companies (~9) think that it is not needed for the reader to explicitly indicate it, while still quite some companies (~7) think that for device to easily determine the presence of midamble at the end, it can be explicitly signaling, and most preferred option is via separate 1-bit indication. From FL perspective, one key motivation to indicate midamble presence at the end is to avoid large number of bits after midamble (that is not at the end). However, in proposal 3-3, the values proposed for interval  to avoid large number of bits after midamble, therefore, such explicit indication is not really necessary. Also, in terms of generally indication the presence/absence of midamble, ~2 companies consider explicit indication. However, it is argued that if the midamble interval indicated is longer than TBS, then this is an implicit indication to the device that midamble is not inserted. Based on above, proposal 3-4 is provided.

HP Proposal 3-4 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Closed] 2nd Discussion Round 
Based on inputs from 1st round, proposals for D2R ambles are update accordingly below:
Proposal 3-2A 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 010
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1







Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}





Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Open] 3rd Discussion Round 

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}









Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]


Proposal 3-5
For m-sequence with n =3  for D2R ambles, adopt initial State 100 and resulting sequence of  1 0 0 1 1 1 0



R2D Postamble

[Closed] 1st Discussion Round 
Table 4-1: Summary of views on R2D postamble


FL observations
Based on above table, from FL perspective, there is almost no change in the situation since last two meetings. From that point of view, it is hard to converge one way or other. Moreover, it seems that for purpose of indicating the end of PRDCH transmission, already RAN2 agreement could be applied, as below by Vivo and Oppo:


With all the above considerations, FL proposal is to conclude that there is no consensus to specify R2D postamble. 

Proposed Conclusion 4-1 
There is no consensus to specify R2D postamble



[Closed] 2nd Discussion Round 

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips



[Open] 3rd Discussion Round 

Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips



(Closed) CAP related issues

[Closed] 1st Discussion Round 
FL observations
In RAN1#120bis, we agreed the CAP pattern and the agreement also included the text that it is supported for all M values corresponding to PRDCH. Based on FL understanding, we don’t necessarily need any additional agreement. However, ~10 companies discussed that in their contributions for this meeting and based on their understanding, the agreement didn’t really explicitly cover the M value for CAP. Therefore, based on the contributions, all the companies that discussed M values for CAP propose that they are same as for PRDCH. Therefore, following proposal is provided:

Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Another aspect which ~4 companies discussed is related to CP handling for CAP. Mostly, the potential issue discussed is when M=24 is applied. For this case, companies have proposed adopting CP handling based on option1 from CP handling related agreement in 9.4.1. Also, one company pointed out no special handling is needed. From FL perspective, effectively, all companies that discussed this issue don’t necessarily mean to apply special handling for CAP in comparison to PRDCH but rather suggest adoption CP handling method with option 1. Therefore, for this agenda, at this point, we don’t need to additional discuss CP handling and rather wait for the discussion to conclude in 9.4.1 If needed, based on outcome of the discussion in 9.4.1 on CP handling method, we can further consider, if any additional discussion is needed for CAP or not














Proposals for offline sessions
1st offline session (Tuesday, May 20, 2025)

Proposal 2-3 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
M value for the variable part chips is up to reader implementation
Note: Detection method of SIP presence at the device is not specified












Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 or 1 0 0 1 1 1 0
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}



Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips





Proposals for online session
1st  online session (Monday, May 19, 2025)
HP Proposal 2-1a 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
Note: Detection method of SIP presence at the device is not specified


HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 













2nd online session (Tuesday, May 20, 2025)
Proposal 2-3A 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified


Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 (for 0101 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}

Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF] chips

3rd online session (Wednesday, May 21, 2025)
Take Proposal 2-3Bv1 or Proposal 2-3Bv2  

Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with minimum allowed value of 0 and a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, SIP duration of 1 2 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.


Proposal 3-3C 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 100 bits, 175 bits, 225 bits
FFS: whether/what additional value(s) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {100 bits, 175 bits, 225 bits}
For signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits (if up to 4 interval values per bit duration adopted) and 3 bits (if up to 8 interval values)
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]


Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips



Contributions in RAN1#121


Appendix
Revised WID (RP-243326): RAN1 Scope & Objectives 
General Scope
The definitions provided in TR 38.848, TR 38.769, and decisions, etc. made during the Rel-19 SI in RAN WGs are taken into this WI, and the following is the exclusive general scope:
The overall objective shall be to standardize the following Ambient IoT device:
Device 1: ~1 µW peak power consumption, has energy storage, RF envelope detector receiver, initial sampling frequency offset (SFO) up to 10X ppm, neither R2D nor D2R amplification in the device. The device’s D2R transmission is backscattered on a carrier wave provided externally.
Deployment scenario 1 with Topology 1, according to D1T1-B. 
FR1 licensed spectrum in FDD, with R2D in DL spectrum and D2R and CW in UL spectrum.
Spectrum deployment in-band to NR and standalone, with A-IoT BS located indoor.
Traffic types DO-DTT, DT, for rUC1 (indoor inventory) and rUC4 (indoor command). 
Carrier wave transmission for waveform 1 only, without hopping, per the following cases in TR 38.769:
Case 1-4 for D1T1-B
Proximity determination via Solution 1 in TR 38.769 only.
Device (un)availability via Direction 1 in TR 38.769 only.

WGs begin their discussions from the decisions already made in TR 38.769, with the following refinements for the scope: 

The following objectives are set, within the General Scope:
RAN1 scope:
PRDCH and PDRCH, which are the only physical channels in R2D and D2R, respectively.
R2D and D2R signal(s)
Multiplexing/multiple access in R2D is by only TDMA, and in D2R is by only TDMA and FDMA.
R2D supports only OOK-4 modulation, one solution for CP handling. D2R backscattering supports only OOK and BPSK modulations.
R2D transmission supports only the Manchester line code in TR 38.769
D2R transmission supports:
Either the Manchester line code in TR 38.769 or no line code (one to be down-selected); and
A corresponding small frequency shift method according to the options in TR 38.769.
R2D does not support FEC. D2R supports only convolutional code with generator polynomials as per TS 36.212. Applying or not applying the FEC to D2R is specified by ensuring it is under the reader control and applies to all devices targeted by the reader.
PRDCH and PDRCH both support transmission without CRC, and with CRC as per the generator polynomials in TS 38.212 for 6-bit CRC and 16-bit CRC. Cases to use which length of CRC, or no CRC, to be decided in RAN1.
D2R supports physical layer repetition transmission. R2D does not support physical-layer repetition transmission. 
RAN2 scope:
Specify the necessary functions and procedures for an Ambient IoT compact protocol stack and lightweight signalling procedure to enable DO-DTT and DT data transmission:
A-IoT Paging, including subsequent paging for the same service. Support the options that a paging message contains one identifier, and that a paging message contains no identifier. 
Note: RAN2 aims to design a paging message format such that multiple identifiers can be contained in one paging message, for forward compatibility purposes.
A-IoT Random access, including re-access for failure handling. Contention-based and contention-free cases are supported. For the contention-based random access, only Solution 1 (3-step only) is included.
A-IoT data transmission, including data (re-)transmission for failure handling. Segmentation is supported at least in D2R.
Only MAC layer is included
RAN3 scope: 
Specify necessary architectural aspects, and signaling and procedures between A-IoT RAN and A-IoT CN to support the A-IoT functions, assuming an architecture of aggregated gNB, including:
Inventory and command operations
Device location reporting at reader ID granularity
Note: The above A-IoT functions are supported over the existing NG interface, based on architecture(s) defined by RAN3/SA2.
RAN4 scope:
Specify RF requirements for Ambient-IoT BS, device 1, and CW
RF requirements for Type 1-C Ambient-IoT BS
RF requirements for device 1
RF requirements for CW
Specify RRM core requirements for device 1, if necessary
Study and develop OTA test methodology for A-IoT device 1
Consider test methods specified in TR 38.870 as starting point. Take test system reuse, test system complexity and test time into account, when developing test methods suitable for Ambient IoT.
Develop the preliminary Measurement Uncertainty (MU) assessment for the test system
Use band n8 as an example band

Note 1: Coordination with SA2 and SA3 is expected. Updates to the WID objectives should be considered if needed.

Note 2: This WI shall target for an IoT segment well below the existing 3GPP IoT technologies, e.g. NB-IoT, eMTC, RedCap, etc. The WI shall not aim to replace existing 3GPP LPWA technologies.

SI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#116 (Athens, Greece, February 26th – March 1st, 2024)
Agreement
At least the following time domain frame structure is studied for A-IoT R2D and D2R transmission.
For R2D transmission,
A R2D timing acquisition signal (e.g. R2D preamble) is included at least for timing acquisition and for indicating the start of the R2D transmission in time domain.
For D2R transmission,
A D2R timing acquisition signal (e.g. D2R preamble) is included at least for timing acquisition and for indicating the start of the D2R transmission in time domain.
FFS other necessary component(s), e.g. midamble, postamble, periodic sync signal, control fields, guard period


RAN1#116bis (Changsha, Hunan Province, China, April 15th – April 19th, 2024)

Agreement
To determine or derive the end of PRDCH transmission, study at least following options:  
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.       
Option 2: Based on R2D control information.

Agreement
For the reader to acquire the end of PDRCH transmission, study at least following options:  
Option 1: D2R postamble immediately follows the PDRCH
Option 2: Based on control information

Agreement
For D2R transmission, study the necessity of midamble at least for the purpose of performing timing/frequency tracking or channel estimation or interference estimation, considering at least the following: 
Modulation and Coding schemes, e.g., data modulation, line/channel coding 
Receiving methods, e.g., coherent or non-coherent
D2R transmission length/packet size
Midamble overhead
Timing/frequency accuracy
Phase accuracy

Agreement
RAN1 study the R2D transmission without midamble as the baseline if Manchester encoding is used.
FFS the necessity for the R2D transmission with midamble if PIE is used. 

Agreement
For the R2D timing acquisition signal immediately preceding the transmission of a physical channel, study a preamble with at least two parts which includes a start-indicator part and a clock-acquisition part, where the start-indicator part immediately precedes the clock-acquisition part:
Start-indicator part provides the start of the R2D transmission
FFS: Details of start-indicator part
Clock-acquisition part provides at least the chip synchronization of the subsequent physical channel transmission
FFS: Details of clock-acquisition part, e.g. structure, encoding, length, etc. 
FFS: Methods to determine chip duration of the subsequent physical channel transmission 
FFS: Other functionalities
Note: the preamble is considered not to be part of a physical channel
FFS: other part(s) of the preamble, if any 
FFS: whether the above clock acquisition is sufficient for all devices
FFS: how to make the preamble compact

Agreement
For D2R, a preamble preceding each PDRCH transmission is studied as the baseline at least for the D2R timing acquisition signal:
Preamble is not part of PDRCH
FFS: Other functionalities of the preamble

Agreement
Reference signals including at least DMRS, PTRS, CSI-RS/TRS, are not further studied for R2D.

Agreement
Reference signals including DMRS, PTRS, SRS, are not further studied for D2R
Note: This doesn’t preclude the possibility to study preamble, midamble, postamble for different purposes, e.g. channel/interference estimation and/or proximity determination


RAN1#117 (Fukuoka City, Fukuoka, Japan, May 20th – 24th, 2024)

Agreement
For the start-indicator part of the R2D time acquisition signal, study the two options below:
Option 1: ON/OFF pattern i.e. high/low voltage transmission 
Option 2: OFF pattern, i.e. low voltage transmission 

Agreement
For R2D, the clock-acquisition part of the R2D time acquisition signal is used to determine the OOK chip duration
FFS: Pattern design to support determination of chip duration


RAN1#118 (Maastricht, NL, August 19th – 23rd,  2024)

Agreement
For each D2R transmission, no separate part for start-indicator is considered for the preamble preceding the PDRCH.

Agreement
For D2R transmission, preamble preceding the PDRCH is studied also for the potential additional functionalities:
SFO estimation
CFO estimation
Channel estimation
Interference estimation
Note: this does not preclude studying the above functionalities by using a midamble and/or postamble, if supported
FFS: Other functionalities, if any

Agreement
For the start-indicator part of the R2D time acquisition signal, ON/OFF pattern i.e. high/low voltage transmission is applied
FFS: length/pattern of ON/OFF.
FFS: when TD2R_min is applicable, whether/how the start-indicator part is included in TD2R_min or not. To be discussed in 9.4.2.2


RAN1#118bis (Hefei, China, October 14th – 18th,  2024)

Agreement
The start indicator part of the R2D time acquisition signal is not included in TD2R_min.

Agreement
The TR will capture the following options, and companies are encouraged to analyze the tradeoffs among the following D2R amble(s) options:
Option 1: D2R preamble only
Option 2: D2R preamble + X midamble(s), where X 1
Option 3: D2R preamble + postamble
Option 4: D2R preamble + Y midamble(s) + postamble, where Y1
For the above options, companies are encouraged to report at least the following:
Purpose(s) of the preamble, midamble and postamble 
Whether companies assume multiple options can be supported


Agreement
For analysing the trade-offs among the D2R amble(s) options, companies can refer to the Table 3.2.4 in section 3.2.4 of R1-2408993 for information.

Agreement
For the clock-acquisition part of the R2D time acquisition signal, following is captured in the TR 38.769:
Clock-acquisition part is based on OOK without line coding and includes rising/falling edges, including at least two rising or at least two falling edges for the device to determine the OOK chip duration

Agreement
For the start-indicator part of the R2D time acquisition signal, for providing the start of the R2D transmission, following is captured in the TR 38.769:
Following options have been studied for the start-indicator part of the R2D time acquisition signal:
Option 1: ON-OFF transmission is considered based on energy/edge detection, and multiple alternatives have been studied including 
Alt 1: A single ON-OFF transmission, i.e. one high-voltage transmission followed by one low-voltage transmission, where ON and OFF may have same or different durations
Alt 2: A multi-ON-OFF transmission, where different ON and different OFF may have same or different durations and different parts may have same or different duration
Option 2: ON-OFF sequence-based design is considered which consists of a pre-defined sequence for detection of start-indicator part based on digital correlation
For both the options, it is observed that a fixed duration for the start-indicator part can be considered, regardless of the value of M used for PRDCH transmissions. 
Miss-detection ratio (MDR), false-alarm ratio (FAR) and detection complexity have been considered for the design of the R2D start indicator part by following companies
It is observed by 1 source [Huawei] that for an FAR of ~0%, the MDR of less than 1% can be achieved with Alt 2 of option 1 (considering 2 ON-OFF transmissions with different durations) and it is also observed that low-complexity and reduced power consumption can be achieved
1 source [ZTE] evaluated Alt 1 of option 1 (considering same duration for ON and OFF) and Alt 2 of option 1 (considering multiple ON-OFF transmissions with same duration) and observed that for an FAR of ~0%, the MDR of less than 1% can be achieved and Alt 1 of option 1 performs better than Alt 2 of option 1. 
1 source [CATT] observed with ON-OFF pattern, that for an FAR of ~0%, the MDR of less than 1% can be achieved with a duration of at least 1 OFDM symbol
1 source [Qualcomm] compares the performance between option 1 and option 2. It shows almost similar coverage range (SNR requirement) for target MDR of 1%. For MDR of 10%, it shows that sequence-based design provides better performance, and it is observed that during the available time, it is feasible for all devices to detect the start-indicator sequence within the power budget. It is further observed that the FAR with sequence-based design can be improved in case of interference scenarios when compared with pattern-based design. 
For both the options, it may be beneficial that the start-indicator part is distinguishable at least from other parts of the R2D transmissions

Agreement
For the clock-acquisition part of the R2D time acquisition signal for OOK chip duration determination, following options are studied:
Option 1: Duration of the clock-acquisition part is variable for different M values, i.e. the duration becomes shorter with increasing value of M
Option 2: Duration of the clock-acquisition part is constant for different M values based on repetition, i.e. repetition factor is increased with increasing value of M to keep the duration constant
FFS: Whether/what restriction on M values for the clock-acquisition part
Note: Other functionalities of clock-acquisition part is a separate discussion

Agreement
For the D2R preamble, binary signal is considered.



RAN1#119 (Orlando, US, Nov 18th – 22nd, 2024)
Agreement
Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
For coherent detection of PDRCH with a payload of 16 bits or 20 bits with 6-bit or 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code:
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, when the same amble(s) overhead is maintained, Option 3 provides comparable performance results to Option 1.
Source [7, Samsung] observed that with up to 10% SFO, ~5kbps data rate, for device 1 and with up to 1% SFO for device 2, the decoding performance with/without midamble are similar
Source [9, vivo] observed that Option 1 is sufficient to achieve 10% and 1% BLER, with no more than 8 SFO hypotheses tested at the reader side.
With up to 10% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2dB and 4 dB) for Option 1, Option 2 of D2R preamble+1midamble and Option 3.
With up to 1% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2.8dB and 3.3dB) for Option 1, Option 2 of D2R preamble+1 midamble and Option 3.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <5*10^3 ppm
With up to 10% SFO, achieving the required accuracy necessitates more than 20 SFO hypotheses at the reader side for Option 1 and 10 SFO hypotheses are sufficient for Option 3 of D2R preamble + postamble. But for Option 3 reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc. 
With up to 1% SFO, 4 SFO hypotheses are sufficient for Option 1 to achieve the required accuracy.

For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieves a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.


Agreement
For the CFO calibration signal, which is required only for device 2b to reduce the frequency offset range and the guard-bandwidth of D2R transmission, the following observations are captured in TR 38.769:
Source [3, Huawei] report that a single-tone RF signal is used as the CFO calibration signal, it is not a part of time acquisition signal and can be transmitted as an optional R2D signal after the PRDCH transmission. 
Sources [2, Ericsson], [19, Panasonic] and [20, OPPO] report that additional synchronization signal is needed. 
[OPPO] state the R2D timing acquisition signal may not be sufficient or may not be usable for CFO calibration since a reference frequency is needed when separate LOs are used for Tx and Rx in device 2b.
Sources [7, Samsung], [9, vivo], [30, Qualcomm], [36, Apple] report that additional synchronization signal is needed if the synchronization for carrier frequency using R2D signal/channel does not provide required functionalities for device 2b.
Source [5, CMCC][31, MTK] report that it may not be possible to achieve enough frequency accuracy (0.01 ppm) even after CFO calibration based on R2D time acquisition signals for coherent detection at reader especially when the D2R data rate is low.

Agreement
For device 2b, a signal for CFO calibration should be provided to synchronize / calibrate the device clock for LO for carrier frequency (Clock purpose #5) to achieve the accuracy after clock sync / calibration at device side captured in Table 5.2.3-1.
Frequency calibration at device 2b is beneficial at least to reduce the guard-bandwidth of D2R transmission.

Agreement
Adopt the updates documented in R1-2410653 for section 6.2 of the TR38.769. 

Agreement
Adopt following update to the TP agreed on Monday

Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
[omit unchanged part]
For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception. 
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.

Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieve a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc
Source [7, Samsung] observes that the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception.

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Source [37, MediaTek] reports that transmitting 96-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 1000 ppm, and transmitting 1000-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 100 ppm.
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.

Agreement
Following observations on R2D clock-acquisition part are captured in TR 38.769:
On impact/restriction of M values for the clock-acquisition part
9 sources [TCL, Nokia, Huawei, CMCC, ZTE, Apple, CATT, Mediatek, Qualcomm] provided observations on the impact/restriction of M values for the clock-acquisition part design requirements:
1 source [Nokia] observed that increasing value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length and use of   provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration. 
2 sources [TCL, Huawei] observed for option 1 of the clock-acquisition part design that no restriction is required to be placed on the M values. Furthermore, 1 source [Huawei] observed that the same 2 ON-OFF voltage (with the same duration) satisfies the FDR performance metric of less than 1% for different M values, e.g., M = 2, 6 and 24, where FDR is the False detection ratio (FDR), i.e. incorrectly calculating M, is the performance metric.
1 source [CMCC] observed that pattern of the clock-acquisition part is related to M chips per OFDM symbol and when M is small, the clock-acquisition part may cross multiple OFDM symbols, and the CP insertion may degrade the timing acquisition performance.
1 source [ZTE] observed that with option 2, the duration of the clock-acquisition part remains consistent across all M values, at least three OFDM symbols maybe required for clock-acquisition part and it maybe not as efficient as option1
1 source [Apple] observed that among the two options studied for the clock-acquisition part, option 2 provides increased robustness, especially in case of large value of M, when compared to option 1 and potentially increase the detection performance of the clock-acquisition part. 
1 source [CATT] observed that if the chip duration is variable based on the M value used for OOK-4 waveform, the detection performance would be limited by the received SINR of the CAP with clear transition of the rising and falling edges.
1 source [Qualcomm] observed that the option 1 with M>1 has shorter duration of clock acquisition part than M=1 and worse timing acquisition accuracy. At least part of PRDCH following the clock acquisition part may need to be used to improve the timing acquisition. Furthermore, the larger M (e.g., M>4) with small chip duration is more sensitive to the SFO accuracy and the restriction of M for the clock acquisition part may be needed.
1 source [Mediatek] further observed that different M values may impact the chip accuracy obtained by the clock acquisition part.

On impact of CP insertion/handling on the clock-acquisition part
10 sources [TCL, CMCC, ZTE, Samsung, Vivo, CATT, NTT Docomo, Qualcomm, Mediatek, Spreadtrum] observed that the CP insertion/handling may impact the design requirements of the clock-acquisition part:
1 source [CMCC] further observed that when the clock-acquisition part occupies more than one OFDM symbol, ON-OFF state transition around CP can avoid the error rising or falling edges due to the CP insertion.
1 source [ZTE] further observed that to mitigate the impact of the CP in the clock-acquisition part for large M values, it can reuse the CP handling method for PRDCH 
1 source [Samsung] further observed that CP insertion/handling on the clock-acquisition part can cause false rising/falling transition and, therefore, the clock acquisition part should be designed such that it does not incur a false rising or falling edges due to CP insertion when CP-OFDM is used for OOK signal generation.
1 source [vivo] further observed that CP insertion/handling on the clock acquisition part will impact the chip duration estimation accuracy. It is further observed that for CP handling, device may not be able to count the clock and estimate OFDM symbol duration accurately until the clock acquisition part if the start indicator only includes a single ON-OFF transmission. 
1 source [CATT] further observed that the SER will be degraded due to uneven chip interval when the CP is inserted within an OFDM symbol, where SER refers to the number of samples which is mismatched for comparing to the total number of samples in a chip.
1 source [NTT Docomo] further observed if CP insertion would cause false rising/falling edges, accuracy of timing acquisition may be impacted.   
1 source [Mediatek] further observed that the issues of chip extension, false raising/falling transition, and additional raising/falling transition caused by CP insertion/handling considering different M values will impact the chip accuracy obtained by the clock acquisition part.
1 source [Spreadtrum] further observed that the design of clock acquisition part should consider that CP insertion does not cause a false rising or falling edges and does not cause different length of multiple high / low voltages within the clock acquisition part when the clock acquisition spans multiple OFDM symbols.
1 source [Huawei] observed CP insertion/handling may not impact the design requirements of the clock-acquisition part

Agreement
For the D2R preamble design, following aspects have been studied and can be captured in the TR 38.769:
Autocorrelation Property
10 sources [Nokia, Huawei, CMCC, Xiaomi, CATT, Oppo, Ericsson, NTT Docomo, Qualcomm, ZTE] observed that the signal should have good autocorrelation properties for accurate peak detection based on the signal correlation at the reader 
Cross-correlation Property
7 sources [Nokia, CMCC, Oppo, Ericsson, Qualcomm, ZTE, CATT] observed that the signal should have good cross-correlation properties if multiple D2R preamble sequences are considered (e.g. for multiple access schemes (if supported) for D2R transmissions). 
Line coding
1 source [Nokia] observed that line coding may impact the autocorrelation property of the sequence. 
1 source [Huawei] observed that for D2R preamble, to apply backscattering, line coding can help improve the detection performance based on shifting the D2R signal’s frequency location away from the carrier wave
Sequence Types (not limited to below types only)
M-sequence
3 sources [Nokia, Vivo, Xiaomi] observed that m-sequence can be considered for D2R preamble mainly owing to good correlation properties.  
Golay sequence
4 sources [CMCC, Vivo, Xiaomi, Samsung] observed that Golay sequence can be considered for D2R preamble mainly owing to good correlation properties and availability of large number of distinct sequences and complementary pairs.  
Walsh sequence
1 source [Oppo] observed that Walsh sequence can be considered as a candidate for D2R preamble thanks to its good auto/cross-correlation property and flexible length
General Observations
1 source [Huawei] observed can achieve 0.97% residual SFO with 98% probability under -2.5dB SNR and 0.1% MDR with [-1/8, 1/8] chip timing error with 99.05% probability under -2.5dB SNR with D2R preamble including 2-parts with clock-like sampling frequency signal and timing-acquisition signal, having 32-length ‘1’ sequence (encoded to 64-chip Manchester code) and 32-length sequence (encoded to 64-chip Manchester code), respectively.
4 sources [TCL, CMCC, ZTE, Vivo] observed that for D2R preamble with binary signal, the timing synchronization performance is highly related to the sequence length of the preamble. Furthermore, 1 source [CMCC] observed that to achieve a BLER performance at 10%, the timing synchronization error should be less than 10%. Furthermore, 1 source [ZTE] observed that the channel estimation performance is also highly related to sequence length. 1 source [ZTE] observed that using a 32 bits preamble provides ~8 dB, ~5 dB performance gain than using 8 bits, 16 bits preamble, respectively. And using a 64 bits preamble provides ~2.5dB performance gain than using a 32 bits preamble.
1 source [Ericsson] observed that for D2R preamble with binary signal, normalized SFO estimation error of less than 10% can be achieved with a training sequence length 64 or longer. The simulated D2R preamble consisting of a Golay complementary pair can tolerate SFO up to 1% (AWGN) with up to 1 dB loss in performance for a sufficiently long preamble sequence length (32 or greater).

Agreement
For determining the end of PRDCH at the device, following two options are studied and captured in the TR 38.769:
Option 1: TBS information (via implicit/explicit L1 R2D control information)
Option 2: Postamble (at the end of PRDCH) 
14 sources [Nokia, Huawei, ZTE, CMCC, Samsung, Ericsson, Oppo, LGE, Qualcomm, Spreadtrum, Mediatek, Cewit, Ericsson, vivo] provided following observations on the above two options for determining the end of PRDCH:
3 sources [Nokia, Huawei, ZTE] observed that option 2 provide two benefits, namely, the variable payload length and to provide timing acquisition before the subsequent transmission of either PDRCH or PRDCH, thus improving the detectability at both reader and the device, respectively. Furthermore, 1 source [Huawei] observed that R2D postamble indicates the TBS with high efficiency for small packets by avoiding a large padding overhead, unlike option 1, which may require devices to perform blind detection of different PRDCH formats (if supported) and the overhead caused by the inclusion of a R2D postamble does not exceed 20% for even the smallest of message sizes and may be less than the signaling overhead caused by using a dedicated TBS indicator
1 source [CMCC] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead, while for large payload size with more bits, the resource overhead of postamble is smaller.
1 source [vivo] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead.
1 source [Samsung] observed option 2 is not strictly required, however, given the possible clock drift at a device, it may be still beneficial to also attach postamble at least for the determination of the end of PRDCH at a device. 
3 sources [Oppo, Spreadtrum, CEWiT] observed that with option 2, the false detection may be higher for shorter postamble. Source [OPPO[ observed that in contrast to option 2, it is more reliable and efficient to indicate TBS with control information in option 1
2 sources [LGE, vivo] observed that if a message type or a command ID is included in L1 control information and implicitly indicates a known size of a fixed TB, then there is no need for either option 1 or option 2
2 sources [Qualcomm, vivo] observed that option 1 has the advantages of avoiding blind detection of postamble and providing the power saving for non-target devices to skip the R2D detection.
1 source [MediaTek] observed that option 1 is feasible for the device to avoid the unnecessary reception of a TB with a specific size and thus enable power saving, e.g., when the TB has a size exceeding the allowance of the device remaining power.
1 source [Ericsson] observed option 2 is not strictly required if the end of PRDCH can be explicitly indicated by R2D control information, and it is subject to the miss-detection rate. It may be beneficial if a PRDCH postamble can serve as an additional timing acquisition signal prior to a PDRCH transmission.

Agreement
For D2R scheduling, midamble (if supported) related information can be explicitly/implicitly indicated via corresponding PRDCH.

Agreement
Following observations on R2D clock-acquisition part are additionally captured in TR 38.769:
On purpose of SFO estimation/correction based on the clock-acquisition part
3 sources [Nokia, CATT, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Nokia] observed that the length of preamble sequence may need to consider also the robustness against SFO
1 source [CATT] observed that device 2a/2b may require higher synchronization accuracy for signal transmission or backscattering and therefore, the design of CAP may be required to accommodate the requirement of additional frequency synchronization and clock calibration for Device 2a/2b. 
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for SFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support SFO correction.
On purpose of CFO estimation/correction based on the clock-acquisition part
2 sources [Ericsson, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Ericsson] observes that the clock-acquisition part can be utilized to solve the frequency synchronization problem without impacting the time-domain sequence, for example by transmitting in some frequency resources and it can be a harmonized solution for both chip duration indication and device frequency synchronization. However, it is further observed that if the time interval between an R2D transmission and the corresponding D2R transmission and if the device loses the timing obtained from the R2D timing acquisition signal due to timing drift at the time for the D2R transmission, then an additional synchronization signal is needed
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for CFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support CFO correction.


WI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#120 (Athens, Greece, Feb 17th – 21st, 2025)
SIP related Agreements
Agreement
For the SIP of R-TAS, for providing the start of the R2D transmission, one single design based on Option 1 is supported and further down-selection to be done among Alt 1 and Alt 2 :
Option 1: ON-OFF transmission with following alternatives:
Alt 1: A single ON-OFF transmission with pre-defined duration for each of the ON-OFF, where ON and OFF may have same or different durations
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt1
Alt 2: A multi-ON-OFF transmission with pre-defined duration for each of the ON(s)-OFF(s), where different ON and different OFF may have same or different durations and different parts may have same or different duration
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt2
Only a single fixed value for entire duration of SIP of R-TAS is supported, which is independent of the value of “M” used in CAP and PRDCH
Note: Specific design and duration for SIP of R-TAS are further discussed, and companies are encouraged to evaluate the designs in terms of target MDR of [10%] for a FAR up to [1%] and at least following assumptions are used:
MDR refers to the probability that SIP is not detected when it was actually transmitted
FAR probability that the receiver incorrectly detects SIP when SIP was not transmitted
Energy/edge detection-based method is the baseline assumption for evaluation purpose
Continue discussion on necessary details for simulation assumptions

Agreement
For the SIP of R-TAS, down-select among the following candidates:
Alt 1 (Single ON-OFF transmission)
Alt 1-1: ON followed by OFF with same duration for both
Alt 1-2: ON followed by OFF with a duration ratio of 1:[2,3]
Alt 1-3: ON followed by OFF with a duration ratio of [2,3]:1
Alt 2 (Multi-ON-OFF transmission)
Alt 2-1: A number of repetition instances of Alt 1-1 or Alt 1-2 or Alt 1-3
Alt 2-2: ON-OFF-ON (duration of ON and OFF can be different)
Alt 2-3: OFF-ON-OFF (duration of ON and OFF can be different)
Alt 2-4: Combination of single instance of Alt 1-1 and single instance of Alt 1-2
For the evaluation purpose, for both options, candidate values related to duration are considered:
Entire duration of SIP: 1/2 OFDM symbol duration or 1 OFDM symbol duration (including clarifying whether OFDM symbol duration includes CP); additional durations can be considered and reported by companies with justification 
Companies to report the exact duration(s) for ON or OFF
Companies are encouraged to report at least the following details for the evaluations:
Baseline assumption is that RF transmission is not present; companies can report other consideration
For FAR calculation, whether noise and/or PRDCH transmission is considered
Details on threshold detection method including whether/how threshold detection training is used based on the proposed design alternative or not
BW assumptions for RF-ED and BB-LPF
Target MDR of up to 1% for FAR of up to [1%, 10%]

CAP related Agreements
Agreement
For the CAP of R-TAS, the starting chip has a different voltage level compared to the end of the SIP of R-TAS.

Agreement
For the design of the CAP of R-TAS, at least 2 transition edges in same direction are included, i.e. at least two transitions from “OFF” chip to “ON” chip or two transitions from “ON” chip to “OFF” chip.

Agreement
For the CAP of R-TAS:
Candidate values for maximum duration of CAP to be further down-selected to one value from : 1.5 OFDM symbol duration, 2 OFDM symbol duration, 3 OFDM symbol duration
For option 1 for CAP of R-TAS from TR 38.769, maximum duration is applicable to minimum value of M to be supported, and the CAP duration becomes shorter with increasing value of M
FFS: whether the number of ON/OFF transmissions in the CAP is fixed or not fixed
For option 2 for CAP of R-TAS from TR 38.769, maximum duration is the only (constant) duration that is applicable for all the M values to be supported
Down-selection between option 1 and option 2 for CAP of R-TAS from TR 38.769 by RAN1#120-bis
FFS: Values of M to be supported


R2D Midamble related Agreement
Agreement
R2D transmission does not include a midamble.

D2R X-amables related Agreement
Agreement
For D2R preamble design, the functionalities of timing acquisition, SFO estimation/time tracking and channel estimation should be supported
For D2R midamble design, the functionalities of SFO estimation/time tracking and channel estimation should be supported
D2R midamble can be transmitted at the end of the PDRCH transmission. If it is at the end, it is not designed for being used for indicating the end of PDRCH transmission
FFS: condition(s) and/or indication where the D2R midamble is present or not

Agreement
For D2R x-ambles:
Following is considered as the types for base sequence and to be further down-selected:
Option 1: M-sequence 
Option 2: Golay sequence
Note: Above doesn’t preclude an additional part for preamble, e.g. with ON and/or OFF transmission, if needed/supported
FFS: Whether/what multiple sequences (using same base sequence type) are supported
Note: This in no way implies that there is going to be CDMA between D2R x-ambles
For evaluation purpose, companies are encouraged to consider following:
Performance at least in terms of autocorrelation/cross-correlation property, SFO estimation/Timing accuracy, SNR for target PDRCH BLER of [1%, 10%]
Report presence and time-domain resource(s) x-ambles
Report sequence type(s) and length(s) for x-ambles
Following format can be considered for reporting the evaluation results



RAN1#120bis (Wuhan, China, April 7th – 11th, 2025)
R-TAS related Agreements (including SIP and CAP)

Agreement
For the pattern of SIP of R-TAS, only the following 2 alternatives are considered for further down-selection:
Alt 1-2: ON-OFF with a ratio of 1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration
Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration

Agreement
For CAP of R-TAS, following is adopted:
Option 1 for CAP of R-TAS from TR 38.769 is adopted where the CAP duration becomes proportionally shorter with increasing value of M, i.e. if for , duration is  OFDM symbol long, then for , duration is  OFDM symbol long
Note: Duration without CP insertion is considered above, with CP insertion, the total duration may not be exactly proportional
Only following two alternatives for CAP pattern are considered for further down-selection to one alternative:
Alt 1: ON-OFF-ON-OFF
Alt 2: ON-OFF-ON


Agreement
For R-TAS, SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

D2R x-ambles related Agreements (including preamble and midamble)

Agreement
For D2R midamble, for determining the presence and location of midamble(s) at the device:
Reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information
FFS: details of signalling
FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end
Note: This does not preclude the support of having no midamble present in the D2R transmission

Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH

Agreement
For indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following is adopted:
Unit of interval is number of bits after FEC (if FEC is applied) and repetition (if repetition is applied)
FFS: the candidate values in terms of the unit of interval

RAN1#121 (St Julian’s, Malta, May 19th  – 23rd , 2025)
Agreement
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Agreement
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission.

Agreement
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between 0 1 0 0 1 1 1 (for 010 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
TDoc file conclusion not found
R1-2504396 Timing acquisition and synchronization.docx
3GPP TSG RAN WG1 Meeting #121    	            R1-2504396
St Julian’s, Malta, May 19th – 23st, 2025

Source:	Qualcomm Incorporated
Title:	Timing acquisition and synchronization
Agenda Item:	9.4.3
Document for: 	Discussion and Decision

Conclusion
In this contribution we have following proposals and observations.

R-TAS SIP

Observation 1:
For Alt 1-2:
MD performance depends on the RF input before SIP, since the ON period of Alt 1-2 is relatively shorter. Compactor threshold training relying only on the ON period of the SIP in Alt 1-2 requires 3dB higher SNR.
FA probabilities are low in general, since the duration of the OFF period of Alt 1-2 is unique (not same as any possible OOK OFF periods of CAP/PRDCH) and long enough.
Alt 2-4 with Method 1:
MD performance is good irrespective of RF input before SIP. 
FA under OOK is very high (almost close to 100%), since the OFF period of Alt 2-4 has the same duration as the OFF period of CAP/PRDCH using M = 2. FA under noise is quite small.
Alt 2-4 with Method 2:
MD performance is similar irrespective of RF input before SIP.
FA under OOK is still high.

Observation 2:
If the comparator threshold can be fixed to (Vhigh + Vlow) / 2 for SIP detection, Alt 2-4 with Method 2 can improve MDR (required SNR 22.5dB for MD 1%), with FAR under OOK of 20%

Proposal 1:
Support Alt 1-2 unless there is a way to resolve false SIP detection issue of Alt 2-4. 


R-TAS CAP

Proposal 2:
The same value M is used for CAP and PRDCH in an R2D transmission

Proposal 3:
For CAP with M = 24, check if uncertainty of CP + CAP pattern due to the last two chips of the OFDM symbol carrying the CAP causes performance loss or complexity increase
If so, inserting padding chips, at the end of OOK chips of the OFDM symbol carrying the CAP, could be considered
For CAP with M = 6, 12, check if uncertainty of the duration of the last OFF period of SIP due to CP in the next OFDM symbol causes loss of SIP detection performance

R2D postamble

Proposal 4:
R2D postamble is not specified
It is up to reader to transmit a waveform that violates Manchester coding rule after the PRDCH such that the receiving device can identify the error and stop the R2D process in case CRC passes falsely

Sequence(s) for D2R preamble and midamble

Proposal 5:
Confirm the working assumption on n = 3 for short sequence for D2R preamble/midamble

Proposal 6:
The sequence for D2R preamble/midamble of a D2R is generated using the following polynomials:
[x^3 + x^2 + 1] for 7-bit sequence
[x^5 + x^2 + 1] for 31-bit sequence
Initialization of shift register is derived from the small frequency shift for the D2R transmission

D2R preamble/midamble(s) intervals

Proposal 7:
Sequence length and interval for D2R preamble/midamble is signalled by 2-bit R2D control information as follows

R1-2504435.docx
3GPP TSG RAN WG1 #121                                   R1-2504435
St Julian’s, Malta, May 19th - 23rd, 2025

Source:	Sharp
Title:	Discussion on timing acquisition and synchronization
Agenda Item:	9.4.3
Document for:	Discussion and Decision
Conclusion
In this contribution, we discuss a few aspects related to timing acquisition and synchronization in A-IoT, and make the following proposals.
For the pattern of SIP of R-TAS, adopt Alt 1-2 (i.e. ON-OFF with a ratio of 1:3).
Manchester coding rule violation corresponding to M value for PRDCH is applied by reader’s implementation that can be used by the device to determine the end of PRDCH transmission.
R2D postamble is not specified.
The device is aware of the number of chips used for Manchester coding rule violation.
For R2D midamble, for determining the presence and location of midamble(s) at the device, the following FFS is not further considered:
“FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end”.
For D2R X-ambles, the candidate values are separately defined for short X-ambles and long X-ambles.
For D2R X-ambles, support multiple sequences (using same base sequence type).

R1-2504483 Discussion on Timing acquisition and synchronization for Ambient IoT.docx
3GPP TSG RAN WG1 #121		R1-2504483

Malta, 19 May – 23 May 2025

Agenda item:	9.4.3
Source:		Indian Institute of Technology Madras [IITM]
Title:			Discussion on Timing acquisition and synchronization for Ambient IoT
Document for:	Discussion


1. 
Conclusion
Observation 1: From the above results, Alt 1-2: On-Off with a ratio of 1:3 with a total SIP duration of 1 OFDM symbol performs better than other alternatives in terms of probability of detection. 
Proposal 1: Alt 1-2: On-Off with a ratio of 1:3 with a total SIP duration of 1 OFDM should be prioritized.
Proposal 2: To make the CAP more resilient, Alt 1 (ON-OFF-ON-OFF) should be prioritized.


3. 
R1-2504503 - Discussion on timing acquisition and synchronization for Ambient IoT.docx
3GPP TSG RAN WG1 #121			R1-2504503
St Julian’s, Malta, May 19th – 23th, 2025

Source:	NTT DOCOMO, INC.
Title:	Discussion on timing acquisition and synchronization for Ambient IoT
Agenda Item:	9.4.3
Document for: 	Discussion and Decision
Conclusion
In this contribution, we discussed timing acquisition and synchronization aspects of A-IoT. Based on the discussion, we made the following proposals.
Observation 1:
For Alt.1-2 and Alt.2-4 of SIP,
With Alt.1-2, device can set threshold of its comparator by first ON. With Alt.2-4, device can set threshold of its comparator by first ON-OFF.
Both Alt.1-2 and 2-4 can be distinguished from other R2Ds.
Both Alt.1-2 and 2-4 occupy 1 PRB bandwidth.
Proposal 1:
For CP impact on SIP and CAP duration, with the assumption that device can identify the CP location after SIP detection, SIP does not include CP. CAP does not include CP.  
Duration of ON/OFFs in CAP is (OS w/o CP) / M.
With the assumption that device cannot identify the CP location before reception of the whole R-TAS, discuss how to handle the CP between SIP and CAP,   
e.g., Last OFF of SIP includes CP. First ON of CAP does include CP. The last chip(s) of the OFDM symbol containing CAP is always set to OFF.
When M=6 or 12 or 24, duration of all ON/OFFs in CAP is (OS w/o CP) / M.
e.g., SIP does not include CP. First ON of CAP includes CP. When M=6 or 12, the last chip of the OFDM symbol containing CAP is always set to OFF. When M=24, the last two chips of the OFDM symbol containing CAP are always set to ON-OFF.
When M=6 or 12 or 24, duration of all ON/OFFs in CAP is (OS w/ CP) / M.
Proposal 2: 
Start of R-SIP is aligned with OFDM symbol boundary.
The start of R-SIP can be aligned with any OFDM symbol.
Proposal 3: 
Device determines the end of R2D transmission based on TBS indicated in L1 R2D control.
Proposal 4: 
For D2R preamble/midamble, for same length, support multiple sequences with lower cross correlation factor. Which sequence is used for D2R transmission is explicitly indicated in corresponding R2D.
For n=3, 1001011 and 0010111 can be supported. 
For n=5, 1000010010110011111000110111010 and 0000100101100111110001101110101 can supported. 
Proposal 5: 
Do not support explicit indication of whether there is a midamble is additionally present at the end.
Proposal 6: 
The interval between ambles can be indicated as a specific value, e.g., interval=0, to indicate “no midamble is transmitted in D2R transmission”.
Proposal 7: 
D2R midamble is not transmitted in Msg.1 transmission in CBRA.

R1-2504600.docx
3GPP TSG RAN WG1 Meeting #121			R1-2504600
St. Julian's, Malta, May 19th – 23rd, 2025


Source:	CEWiT
Title:	Discussion on timing acquisition and synchronization aspects for Ambient IoT
Agenda Item:	9.4.3
Document for:	Discussion and Decision

Conclusion
In this document we discussed on timing acquisition, synchronization, and necessity of preamble, midamble, and postamble for A-IoT in both R2D and D2R transmissions. The following proposals are made: 
Proposal 1: Multi-ON-OFF transmission Alt 2-4 for Start indicator part design is supported.
Observation 1: Preamble should be differentiable from the PRDCH.
Proposal 2: Following options are supported for differentiating the preamble from the PRDCH: 
Preamble followed by a long low voltage or guard time
Preamble followed by a TR2D_R2D_min for PRDCH

Observation 2: Regarding the options to determine or derive the end of PRDCH transmission:
Option 1 is more robust, lower miss/false-detection probability compared to option 2
In option 1, no additional power consumption caused by the miss detection compared to option 2
Option 1 offers greater flexibility for scheduling and operations
Option 1 can be used to mitigate the postamble overhead
Option 2 increases power consumption and detection failure if a device miss/false-detects the postamble. 
In option 2, additional signal needs to be defined and to be detected by the device
Option 2 adds latency delay to the decoding
		
Proposal 3: To determine or derive the end of PRDCH transmission, Option 1 (L1 R2D control information) is supported.
Proposal 4: To determine or derive the end of PDRCH transmission, Option 2 (based on control information) is supported.

R1-2504635 Discussion on timing acquisition and synchronization aspect for AIoT_9.4.3.docx
3GPP TSG RAN WG1 #121	 R1-2504635
St Julian’s, Malta, May 19th – May 23rd, 2025

Agenda item:       9.4.3
Source:	IIT Kanpur
Title:	Discussion on timing acquisition and synchronization aspects for AIoT
Document for:     Discussion and Decision
Conclusion
This paper provides the following observations and proposals:
Proposal 1: Alt 2-4 with pattern of ON-OFF-ON-OFF with a ratio of 1:1:1:3, for 1 OFDM symbol duration should be considered for SIP of the R-TAS.
Proposal 2: For R2D, support the use of the same M value set of (2, 6, 12, 24) for CAP as is defined for PRDCH.
Proposal 3: The Transport Block Size (TBS) should be explicitly indicated in the R2D control information to enable the device to determine the end of the PRDCH transmission.
Proposal 4: A postamble that violates the self-clocking property of Manchester coding, such as a sequence of always-ON chips, should be appended at the end of the PRDCH transmission to assist in end-of-transmission detection.

4. 
R1-2504716.docx
3GPP TSG RAN WG1 #121												        R1-2504716
St Julian’s, Malta, May 19th – 23rd, 2025
Title: 	Discussion on Ambient IoT signals
Source: 	ZTE Corporation, Sanechips
Agenda item:	9.4.3
Document for:	Discussion and decision
Conclusion
In this contribution, the downlink and uplink signal/channels are discussed for A-IoT. We have the following observations and proposals.
Observation 1: CP and the first part(e.g., first one-third part) in SIP can be used for threshold training.
Observation 2: GNB reader can ensure an OFF period before SIP transmission to avoid collision with R2D transmission. The OFF period before SIP transmission and the first part(e.g., first one-third part) in SIP can be also used for threshold training.
Observation 3: More transition edges within the SIP pattern may increase the detecting complexity.
Observation 4: ‌The SIP pattern "1000" (M=4) has 2 dB MDR gain than the "101000" pattern (M=6) at both BLER=0.1 and BLER=0.01.
Observation 5: SIP pattern "1000" (M=4) demonstrates a significantly larger deviation from the R2D data compared to the "101000" pattern (M=6).
Observation 6: In case of data with M=6, the FAR of Alt 2-4 is about 3~4 times higher than that of Alt 1-2.
Observation 7: For length 7, S 1-1 has better performance compared to other sequences.
Observation 8: For length 31, S 2-1 has better performance compared to other sequences.
Observation 9: For D2R transmission with a TBS of 96 bits, which occupies approximately 76.6ms, at least one midamble(in the middle or end of PDRCH) can be supported.
Observation 10: For D2R transmission with a TBS of 400 bits, which occupies approximately 319.2ms, at least a preamble and 2 midambles(one is located near the end of PDRCH) should be supported.
Observation 11: For D2R transmission with a TBS of 1000 bits, which occupies approximately 798 ms, at least a preamble and 3 midambles(one is located near the end of PDRCH) should be supported.

Proposal 1: Support SIP pattern as "1000" (M=4).
Proposal 2: For R2D postamble pattern, three low voltage can be considered and the end position of the third low level serves as the D2R timing reference point.
Proposal 3: Confirm the working assumption: Short preamble/midamble is generated based on n=3.
Proposal 4: In one D2R transmission, the length of preamble and midamble should be same.
Proposal 5: Sequence [1,0,1,0,0,1,1] is proposed for 7-length amble(s).
Proposal 6: Sequence [1,1,1,0,1,1,0,0,0,1,1,1,1,1,0,0,1,1,0,1,0,0,1,0,0,0,0,1,0,1,0] is proposed for 31-length amble(s).
Proposal 7: The following methods can be considered to determine the interval value:
- Method 1: Use coarse granularity to reduce the number of candidate values and indicate one interval value from the candidate values.
i. A value of infinity or a value larger than 12000(e.g., 19200) can be considered to be used as indication when no midamble is needed within the PDRCH transmission.
ii. The candidate interval values can be one of the following:
1. Candidate 1: 150, 300, 600, 1200, 2400, 4800, 9600, 19200.
2. Candidate 2: 150, 300, 600, 1200, 2400, 4800, 9600, infinity.
iii. 3 bits are used to indicate one interval value from the candidate values.
- Method 2: Indicate a set of interval candidates by interval duration and determine one by Tb.
i. 1 or 2 bits are used to indicate one interval duration.
Proposal 8: The reader can explicitly indicate with one bit whether a midamble additionally presents at the end.

R1-2504863 FL Summary#4_AI_9_4_3.docx
3GPP TSG RAN WG1 #121		             R1-2504863
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	Moderator (Apple)
Title:	FL Summary#4 on timing acquisition & synchronization for Ambient IoT
Document for:	Discussion & Decision

Introduction & Work-Plan for RAN1#121
This document provides the feature lead summary on the offline discussions/inputs/proposals for AI 9.4.3 timing acquisition and synchronization signals for R2D and D2R for ambient IoT WI during RAN1#121. 


Contact Information
Please consider providing your company name, your name and email address to be able to reach for any potential offline discussions/contact regarding AI 9.4.3 on timing acquisition and synchronization for ambient IoT.





Work Plan
Issues for discussion/completion in this meeting are categorized as below:
High-priority issues:
Finalize SIP pattern by down-selecting between Alt 1-2 and Alt 2-4
D2R ambles:
Confirm WA  and finalize m-sequences corresponding to n =3 and n =5
Finalize interval values for D2R midambles and signaling framework
Medium-priority issues:
Conclude whether R2D postamble is supported and specified, or not
If there is still no consensus, then the natural outcome will be R2D postamble is not specified
Low-priority issues:
CAP related aspects
I don’t intend to spend much offline time, and hopefully as needed, we can quickly agree on this part during online session


(Closed) SIP of R-TAS







[Closed] 1st Discussion Round 
Table 2-1: Summary of views on alternatives for SIP



FL Observations:
Based on the contributions, Alt 1-2 has slightly higher majority support compared to Alt 2-4. However, in terms of simulation, 4 companies showed that Alt 2-4 performance better compared to Alt 1-2, especially in terms of MDR performance. On the other hand, 3 companies showed that Alt 1-2 performs better, especially  in terms of FAR, considering scenarios for evaluations including presence of other R2D transmissions. From FL perspective, basically, it is clear that MDR with Alt 2-4 is expected to be better than Alt 1-2 considering all scenarios and no assumption of any transmission before SIP. For FAR, mainly the issue is shown by proponents of Alt 1-2 under scenario when the last 3 OFF chips in SIP are not easily distinguishable. Based on agreed M values for PRDCH, this should not be the issue because effectively SIP with 1 OFDM symbol duration avoids that issue as it has 3 OFF chips at end with effectively M corresponding to 6. Such pattern of chips for that duration is not expected in other transmissions. Also, for M = 2 [16] shows that due to no particular assumption on any transmission before SIP, even with Alt 1-2, high FAR is shown.
Therefore, with consideration that no assumption on RF transmission before SIP is applied and at least 4 companies demonstrate via simulations that Alt 2-4 can work in all scenarios corresponding to PRDCH with all the agreed M values, following proposal is provided.

HP Proposal 2-1 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
 

Another additional aspect to clarify, based on the note in the endorsed TS by spec editor, whether/how the presence of SIP is detected need to be captured in the specification or not. Based on the contributions, only except 1 company, there is no explicit proposal to specify how the presence of SIP is detected by device. However, to further align understanding among companies, following question is drafted for your inputs.


Question 2-2 
Do you think that TS 38.291 needs to capture on how the presence of SIP is detected at the device or is it up to device’s implementation? 







[Closed] 2nd Discussion Round 
Regarding the SIP Pattern, at this stage, I don’t believe that reiterating known arguments will help move the discussion forward. Therefore, I’d like to request companies to only respond if they cannot live with a particular alternative. There is no need to restate preferences, as those are already well understood.

Question 2-2v1 
Do you have strong objections to either Alt 1–2 or Alt 2–4, such that you cannot accept it under any circumstances?


[Closed] 3rd Discussion Round 
Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with minimum allowed value of 0 and a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified




Proposal 2-3C 
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.


D2R ambles 





[Closed] 1st Discussion Round 
FL observations
On Working Assumption Confirmation: Regarding the working assumption on supporting n=3 for D2R ambles, 5 companies explicitly discussed and proposed to confirm the WA, while 1 company explicitly proposed to not confirm the working assumption and rather agree on n=4. All the other companies that provided their views relayed to D2R ambles, although didn’t explicitly propose to confirm the WA, but based on the proposals, it is quite clear that they assume and consider WA to be confirmed. One company that proposes to change from n=3 to n=4 shows performance gain improvements with n=4. However, as discussed in RAN1#120bis, since n=5 is already agreed, therefore, the other value of n =3 was chosen based on reasonable performance gap, otherwise the benefit of supporting two lengths diminishes. Therefore, considering, all but one company, prefer to confirm WA, proposal 3-1 is provided. Also, only ~3 companies consider supporting different length combinations for midamble and preamble, however, majority of companies don’t see a motivation to support such a combination. Therefore, from FL perspective, we don’t need to further discuss that as it is not critical or necessary issue. 

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH



Sequence Generation: Below tables summarizes the sequences considered by companies for n=3 and n=4. In terms of exact sequences, there is almost no common sequence considered by multiple companies. However, in terms of polynomial used for sequence generation, companies mainly considered between 2 alternatives, each for n = 3 and n=4. Companies have also provided evaluations and generally all the proposed polynomials have good performance, primarily in terms of good correlation properties and peak sidelobe level. Therefore, from FL perspective, as a starting point, single polynomial for n =3 and n =4 is proposed in proposal 3-2. Furthermore, in terms of initial state, most companies did not discuss exact values, except for 3 companies. One company proposed to not fix the initial state and rather specify an association with frequency shift to allow for multiple sequences. However, considering limited time and no clear motivation without CDM, FL suggestion is to consider fixed initial state and support only single sequence for each of the n value. Therefore, for initial state, also FL’s suggestion is to adopt 1 fixed state and based on that single fixed sequence for each of n can be specified. For n =3, based on majority x³ + x² + 1 can be considered and furthermore with initial state of 010, it provides best PSL=1 among all the other sequences. Accordingly, proposal is provided. For n =5, there is equal support for the two polynomials. In terms of performance, both sequence is almost similar. For polynomial x⁵ + x³ + 1, with initial state of 01001, better PSL is achieved in comparison to initial state of 00001. Therefore, at least in case of this polynomial, initial state of 01001 is only considered for further discussion. For polynomial x⁵ + x² + 1, only initial state of 11000 is provided. Accordingly, proposal is provided with two options for further down-selection. 

Table 3-1: Summary of Sequence Generation from Companies


HP Proposal 3-2 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 0101
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Down-select one option from the two options in RAN1#121:
Option 1: 
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Option 2: 
Polynomial: x⁵ + x² + 1
Initial State: 11000
Resulting Sequence: 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 01




Midamble intervals: ~11 companies provided exact interval values; however, the candidate set of values are quite divergent. Depending on time variation in the channel and SFO/timing estimation requirement, companies justify multiple set of values. Based on the contributions, considering only time variation in the channel, interval in order of ~275 bits for a bit duration of 266.67μs is reasonable. However, considering SFO/timing estimation requirement and the maximum remaining bits after the last midamble, interval in the order of ~30 bits for length 7 of preamble/midamble seems reasonable. Therefore, considering above and two different lengths of preamble/midamble, FL’s recommendation is to at least agree on at least 4 values within the range of 25-275 bits with a gap of 75 bits. Furthermore, in order for reader to have flexibility, no specific association between length of preamble/midamble needs to be specified and leave it up to signalling as determined by reader. Based on above, proposal 3-3 is provided. 

HP Proposal 3-3 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 25 bits, 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits}
For other supported bit durations of 266.67μs/Y
I = Y * {25 bits, 100 bits, 175 bits, 225 bits}




Signaling for preamble/midamble: Regarding the signaling framework, companies have considered mainly two different methods to signal length of preamble/midamble and midamble interval. One method is joint indication of the length and midamble interval, while the other method is the separate indication, i.e. separate bitfield for length indication and separate bitfield for midamble interval. Considering the argument provided under 3) to allow more flexibility to reader and not necessarily specify certain combinations of length and corresponding midamble intervals, FL’s recommendation is to adopt separate indication for preamble/midamble length and midamble interval. Another aspect that companies discussed is whether an explicit indication for midamble presence at the end is needed or not and if needed, how to indicate it. Majority companies (~9) think that it is not needed for the reader to explicitly indicate it, while still quite some companies (~7) think that for device to easily determine the presence of midamble at the end, it can be explicitly signaling, and most preferred option is via separate 1-bit indication. From FL perspective, one key motivation to indicate midamble presence at the end is to avoid large number of bits after midamble (that is not at the end). However, in proposal 3-3, the values proposed for interval  to avoid large number of bits after midamble, therefore, such explicit indication is not really necessary. Also, in terms of generally indication the presence/absence of midamble, ~2 companies consider explicit indication. However, it is argued that if the midamble interval indicated is longer than TBS, then this is an implicit indication to the device that midamble is not inserted. Based on above, proposal 3-4 is provided.

HP Proposal 3-4 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Closed] 2nd Discussion Round 
Based on inputs from 1st round, proposals for D2R ambles are update accordingly below:
Proposal 3-2A 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 010
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1







Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}





Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Open] 3rd Discussion Round 

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}









Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 3-5
For m-sequence with n =3  for D2R ambles, adopt initial State 100 and resulting sequence of  1 0 0 1 1 1 0


[Closed] 4th Discussion Round 

Proposal 3-5A (to be updated with one state and one resulting sequence) 
For m-sequence with n =3  for D2R ambles, adopt [initial State 100 and resulting sequence of      1 0 0 1 1 1 0 or initial State 010 and resulting sequence of 0 1 0 0 1 1 1]




R2D Postamble

[Closed] 1st Discussion Round 
Table 4-1: Summary of views on R2D postamble


FL observations
Based on above table, from FL perspective, there is almost no change in the situation since last two meetings. From that point of view, it is hard to converge one way or other. Moreover, it seems that for purpose of indicating the end of PRDCH transmission, already RAN2 agreement could be applied, as below by Vivo and Oppo:


With all the above considerations, FL proposal is to conclude that there is no consensus to specify R2D postamble. 

Proposed Conclusion 4-1 
There is no consensus to specify R2D postamble



[Closed] 2nd Discussion Round 

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips



[Open] 3rd Discussion Round 

Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips








[Open] 4th Discussion Round 
Proposal 4-2B 
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips regardless of the CP handling method 
R2D padding duration is determined after R2D postamble insertion
 




(Closed) CAP related issues

[Closed] 1st Discussion Round 
FL observations
In RAN1#120bis, we agreed the CAP pattern and the agreement also included the text that it is supported for all M values corresponding to PRDCH. Based on FL understanding, we don’t necessarily need any additional agreement. However, ~10 companies discussed that in their contributions for this meeting and based on their understanding, the agreement didn’t really explicitly cover the M value for CAP. Therefore, based on the contributions, all the companies that discussed M values for CAP propose that they are same as for PRDCH. Therefore, following proposal is provided:

Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Another aspect which ~4 companies discussed is related to CP handling for CAP. Mostly, the potential issue discussed is when M=24 is applied. For this case, companies have proposed adopting CP handling based on option1 from CP handling related agreement in 9.4.1. Also, one company pointed out no special handling is needed. From FL perspective, effectively, all companies that discussed this issue don’t necessarily mean to apply special handling for CAP in comparison to PRDCH but rather suggest adoption CP handling method with option 1. Therefore, for this agenda, at this point, we don’t need to additional discuss CP handling and rather wait for the discussion to conclude in 9.4.1 If needed, based on outcome of the discussion in 9.4.1 on CP handling method, we can further consider, if any additional discussion is needed for CAP or not














Proposals for offline sessions
1st offline session (Tuesday, May 20, 2025)

Proposal 2-3 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
M value for the variable part chips is up to reader implementation
Note: Detection method of SIP presence at the device is not specified












Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 or 1 0 0 1 1 1 0
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100/96 bits, 175/160 bits, 225/224 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} including the case where a interval value could indicate presence of midamble at the end
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}
Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH


Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips





2nd offline session (Thursday, May 22, 2025)

Proposal 3-5A (to be updated with one state and one resulting sequence) 
For m-sequence with n =3  for D2R ambles, adopt [initial State 100 and resulting sequence of      1 0 0 1 1 1 0 or initial State 010 and resulting sequence of 0 1 0 0 1 1 1]

(updated) Proposal 4-2B 
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips regardless of the CP handling method, i.e. additional 2 ON chips at end are there for M=24
R2D padding duration is determined after R2D postamble insertion
Supporting R2D postamble should not imply that device is mandated to use R2D postamble for detecting the end of PRDCH transmission, e.g. other solutions based on CRC check and/or higher-layer information could be used, but are not mandated for the device

Proposals for online session
1st  online session (Monday, May 19, 2025)
HP Proposal 2-1a 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
Note: Detection method of SIP presence at the device is not specified


HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 













2nd online session (Tuesday, May 20, 2025)
Proposal 2-3A 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified


Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 (for 0101 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}

Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF] chips

3rd online session (Wednesday, May 21, 2025)
Take Proposal 2-3Bv1 or Proposal 2-3Bv2  

Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with minimum allowed value of 0 and a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, SIP duration of 1 2 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.



Proposal 3-3C 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 100 bits, 175 bits, 225 bits
FFS: whether/what additional value(s) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {100 bits, 175 bits, 225 bits}
For signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits (if up to 4 interval values per bit duration adopted) and 3 bits (if up to 8 interval values)
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]


Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips























4th online session (Thursday, May 22, 2025)
Proposal 4-2C: Take v1 or v2

Proposal 4-2C-v1
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips
Note: For M=24, 2 ON chips at the end of OFDM symbol for CP handling are in addition to R2D postamble, but not constitute as part of the R2D postamble
R2D padding duration is determined after R2D postamble insertion
Note: Exact method for determining the end of PRDCH at the device is not specified
It is up to device implementation on whether/how R2D postamble and/or higher-layer information based on following agreement from RAN2 is used for determining the end of PRDCH transmission


Proposal 4-2C-v2
There is no consensus to specify R2D postamble
Note: RAN1 can rely on higher-layer information for determining the end of PRDCH transmission based on following agreement from RAN2

 
Proposal 3-5B 
For m-sequence with n =3  for D2R ambles, adopt initial State of 100 and resulting sequence of      1 0 0 1 1 1 0


Contributions in RAN1#121


Appendix
Revised WID (RP-243326): RAN1 Scope & Objectives 
General Scope
The definitions provided in TR 38.848, TR 38.769, and decisions, etc. made during the Rel-19 SI in RAN WGs are taken into this WI, and the following is the exclusive general scope:
The overall objective shall be to standardize the following Ambient IoT device:
Device 1: ~1 µW peak power consumption, has energy storage, RF envelope detector receiver, initial sampling frequency offset (SFO) up to 10X ppm, neither R2D nor D2R amplification in the device. The device’s D2R transmission is backscattered on a carrier wave provided externally.
Deployment scenario 1 with Topology 1, according to D1T1-B. 
FR1 licensed spectrum in FDD, with R2D in DL spectrum and D2R and CW in UL spectrum.
Spectrum deployment in-band to NR and standalone, with A-IoT BS located indoor.
Traffic types DO-DTT, DT, for rUC1 (indoor inventory) and rUC4 (indoor command). 
Carrier wave transmission for waveform 1 only, without hopping, per the following cases in TR 38.769:
Case 1-4 for D1T1-B
Proximity determination via Solution 1 in TR 38.769 only.
Device (un)availability via Direction 1 in TR 38.769 only.

WGs begin their discussions from the decisions already made in TR 38.769, with the following refinements for the scope: 

The following objectives are set, within the General Scope:
RAN1 scope:
PRDCH and PDRCH, which are the only physical channels in R2D and D2R, respectively.
R2D and D2R signal(s)
Multiplexing/multiple access in R2D is by only TDMA, and in D2R is by only TDMA and FDMA.
R2D supports only OOK-4 modulation, one solution for CP handling. D2R backscattering supports only OOK and BPSK modulations.
R2D transmission supports only the Manchester line code in TR 38.769
D2R transmission supports:
Either the Manchester line code in TR 38.769 or no line code (one to be down-selected); and
A corresponding small frequency shift method according to the options in TR 38.769.
R2D does not support FEC. D2R supports only convolutional code with generator polynomials as per TS 36.212. Applying or not applying the FEC to D2R is specified by ensuring it is under the reader control and applies to all devices targeted by the reader.
PRDCH and PDRCH both support transmission without CRC, and with CRC as per the generator polynomials in TS 38.212 for 6-bit CRC and 16-bit CRC. Cases to use which length of CRC, or no CRC, to be decided in RAN1.
D2R supports physical layer repetition transmission. R2D does not support physical-layer repetition transmission. 
RAN2 scope:
Specify the necessary functions and procedures for an Ambient IoT compact protocol stack and lightweight signalling procedure to enable DO-DTT and DT data transmission:
A-IoT Paging, including subsequent paging for the same service. Support the options that a paging message contains one identifier, and that a paging message contains no identifier. 
Note: RAN2 aims to design a paging message format such that multiple identifiers can be contained in one paging message, for forward compatibility purposes.
A-IoT Random access, including re-access for failure handling. Contention-based and contention-free cases are supported. For the contention-based random access, only Solution 1 (3-step only) is included.
A-IoT data transmission, including data (re-)transmission for failure handling. Segmentation is supported at least in D2R.
Only MAC layer is included
RAN3 scope: 
Specify necessary architectural aspects, and signaling and procedures between A-IoT RAN and A-IoT CN to support the A-IoT functions, assuming an architecture of aggregated gNB, including:
Inventory and command operations
Device location reporting at reader ID granularity
Note: The above A-IoT functions are supported over the existing NG interface, based on architecture(s) defined by RAN3/SA2.
RAN4 scope:
Specify RF requirements for Ambient-IoT BS, device 1, and CW
RF requirements for Type 1-C Ambient-IoT BS
RF requirements for device 1
RF requirements for CW
Specify RRM core requirements for device 1, if necessary
Study and develop OTA test methodology for A-IoT device 1
Consider test methods specified in TR 38.870 as starting point. Take test system reuse, test system complexity and test time into account, when developing test methods suitable for Ambient IoT.
Develop the preliminary Measurement Uncertainty (MU) assessment for the test system
Use band n8 as an example band

Note 1: Coordination with SA2 and SA3 is expected. Updates to the WID objectives should be considered if needed.

Note 2: This WI shall target for an IoT segment well below the existing 3GPP IoT technologies, e.g. NB-IoT, eMTC, RedCap, etc. The WI shall not aim to replace existing 3GPP LPWA technologies.

SI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#116 (Athens, Greece, February 26th – March 1st, 2024)
Agreement
At least the following time domain frame structure is studied for A-IoT R2D and D2R transmission.
For R2D transmission,
A R2D timing acquisition signal (e.g. R2D preamble) is included at least for timing acquisition and for indicating the start of the R2D transmission in time domain.
For D2R transmission,
A D2R timing acquisition signal (e.g. D2R preamble) is included at least for timing acquisition and for indicating the start of the D2R transmission in time domain.
FFS other necessary component(s), e.g. midamble, postamble, periodic sync signal, control fields, guard period


RAN1#116bis (Changsha, Hunan Province, China, April 15th – April 19th, 2024)

Agreement
To determine or derive the end of PRDCH transmission, study at least following options:  
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.       
Option 2: Based on R2D control information.

Agreement
For the reader to acquire the end of PDRCH transmission, study at least following options:  
Option 1: D2R postamble immediately follows the PDRCH
Option 2: Based on control information

Agreement
For D2R transmission, study the necessity of midamble at least for the purpose of performing timing/frequency tracking or channel estimation or interference estimation, considering at least the following: 
Modulation and Coding schemes, e.g., data modulation, line/channel coding 
Receiving methods, e.g., coherent or non-coherent
D2R transmission length/packet size
Midamble overhead
Timing/frequency accuracy
Phase accuracy

Agreement
RAN1 study the R2D transmission without midamble as the baseline if Manchester encoding is used.
FFS the necessity for the R2D transmission with midamble if PIE is used. 

Agreement
For the R2D timing acquisition signal immediately preceding the transmission of a physical channel, study a preamble with at least two parts which includes a start-indicator part and a clock-acquisition part, where the start-indicator part immediately precedes the clock-acquisition part:
Start-indicator part provides the start of the R2D transmission
FFS: Details of start-indicator part
Clock-acquisition part provides at least the chip synchronization of the subsequent physical channel transmission
FFS: Details of clock-acquisition part, e.g. structure, encoding, length, etc. 
FFS: Methods to determine chip duration of the subsequent physical channel transmission 
FFS: Other functionalities
Note: the preamble is considered not to be part of a physical channel
FFS: other part(s) of the preamble, if any 
FFS: whether the above clock acquisition is sufficient for all devices
FFS: how to make the preamble compact

Agreement
For D2R, a preamble preceding each PDRCH transmission is studied as the baseline at least for the D2R timing acquisition signal:
Preamble is not part of PDRCH
FFS: Other functionalities of the preamble

Agreement
Reference signals including at least DMRS, PTRS, CSI-RS/TRS, are not further studied for R2D.

Agreement
Reference signals including DMRS, PTRS, SRS, are not further studied for D2R
Note: This doesn’t preclude the possibility to study preamble, midamble, postamble for different purposes, e.g. channel/interference estimation and/or proximity determination


RAN1#117 (Fukuoka City, Fukuoka, Japan, May 20th – 24th, 2024)

Agreement
For the start-indicator part of the R2D time acquisition signal, study the two options below:
Option 1: ON/OFF pattern i.e. high/low voltage transmission 
Option 2: OFF pattern, i.e. low voltage transmission 

Agreement
For R2D, the clock-acquisition part of the R2D time acquisition signal is used to determine the OOK chip duration
FFS: Pattern design to support determination of chip duration


RAN1#118 (Maastricht, NL, August 19th – 23rd,  2024)

Agreement
For each D2R transmission, no separate part for start-indicator is considered for the preamble preceding the PDRCH.

Agreement
For D2R transmission, preamble preceding the PDRCH is studied also for the potential additional functionalities:
SFO estimation
CFO estimation
Channel estimation
Interference estimation
Note: this does not preclude studying the above functionalities by using a midamble and/or postamble, if supported
FFS: Other functionalities, if any

Agreement
For the start-indicator part of the R2D time acquisition signal, ON/OFF pattern i.e. high/low voltage transmission is applied
FFS: length/pattern of ON/OFF.
FFS: when TD2R_min is applicable, whether/how the start-indicator part is included in TD2R_min or not. To be discussed in 9.4.2.2


RAN1#118bis (Hefei, China, October 14th – 18th,  2024)

Agreement
The start indicator part of the R2D time acquisition signal is not included in TD2R_min.

Agreement
The TR will capture the following options, and companies are encouraged to analyze the tradeoffs among the following D2R amble(s) options:
Option 1: D2R preamble only
Option 2: D2R preamble + X midamble(s), where X 1
Option 3: D2R preamble + postamble
Option 4: D2R preamble + Y midamble(s) + postamble, where Y1
For the above options, companies are encouraged to report at least the following:
Purpose(s) of the preamble, midamble and postamble 
Whether companies assume multiple options can be supported


Agreement
For analysing the trade-offs among the D2R amble(s) options, companies can refer to the Table 3.2.4 in section 3.2.4 of R1-2408993 for information.

Agreement
For the clock-acquisition part of the R2D time acquisition signal, following is captured in the TR 38.769:
Clock-acquisition part is based on OOK without line coding and includes rising/falling edges, including at least two rising or at least two falling edges for the device to determine the OOK chip duration

Agreement
For the start-indicator part of the R2D time acquisition signal, for providing the start of the R2D transmission, following is captured in the TR 38.769:
Following options have been studied for the start-indicator part of the R2D time acquisition signal:
Option 1: ON-OFF transmission is considered based on energy/edge detection, and multiple alternatives have been studied including 
Alt 1: A single ON-OFF transmission, i.e. one high-voltage transmission followed by one low-voltage transmission, where ON and OFF may have same or different durations
Alt 2: A multi-ON-OFF transmission, where different ON and different OFF may have same or different durations and different parts may have same or different duration
Option 2: ON-OFF sequence-based design is considered which consists of a pre-defined sequence for detection of start-indicator part based on digital correlation
For both the options, it is observed that a fixed duration for the start-indicator part can be considered, regardless of the value of M used for PRDCH transmissions. 
Miss-detection ratio (MDR), false-alarm ratio (FAR) and detection complexity have been considered for the design of the R2D start indicator part by following companies
It is observed by 1 source [Huawei] that for an FAR of ~0%, the MDR of less than 1% can be achieved with Alt 2 of option 1 (considering 2 ON-OFF transmissions with different durations) and it is also observed that low-complexity and reduced power consumption can be achieved
1 source [ZTE] evaluated Alt 1 of option 1 (considering same duration for ON and OFF) and Alt 2 of option 1 (considering multiple ON-OFF transmissions with same duration) and observed that for an FAR of ~0%, the MDR of less than 1% can be achieved and Alt 1 of option 1 performs better than Alt 2 of option 1. 
1 source [CATT] observed with ON-OFF pattern, that for an FAR of ~0%, the MDR of less than 1% can be achieved with a duration of at least 1 OFDM symbol
1 source [Qualcomm] compares the performance between option 1 and option 2. It shows almost similar coverage range (SNR requirement) for target MDR of 1%. For MDR of 10%, it shows that sequence-based design provides better performance, and it is observed that during the available time, it is feasible for all devices to detect the start-indicator sequence within the power budget. It is further observed that the FAR with sequence-based design can be improved in case of interference scenarios when compared with pattern-based design. 
For both the options, it may be beneficial that the start-indicator part is distinguishable at least from other parts of the R2D transmissions

Agreement
For the clock-acquisition part of the R2D time acquisition signal for OOK chip duration determination, following options are studied:
Option 1: Duration of the clock-acquisition part is variable for different M values, i.e. the duration becomes shorter with increasing value of M
Option 2: Duration of the clock-acquisition part is constant for different M values based on repetition, i.e. repetition factor is increased with increasing value of M to keep the duration constant
FFS: Whether/what restriction on M values for the clock-acquisition part
Note: Other functionalities of clock-acquisition part is a separate discussion

Agreement
For the D2R preamble, binary signal is considered.



RAN1#119 (Orlando, US, Nov 18th – 22nd, 2024)
Agreement
Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
For coherent detection of PDRCH with a payload of 16 bits or 20 bits with 6-bit or 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code:
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, when the same amble(s) overhead is maintained, Option 3 provides comparable performance results to Option 1.
Source [7, Samsung] observed that with up to 10% SFO, ~5kbps data rate, for device 1 and with up to 1% SFO for device 2, the decoding performance with/without midamble are similar
Source [9, vivo] observed that Option 1 is sufficient to achieve 10% and 1% BLER, with no more than 8 SFO hypotheses tested at the reader side.
With up to 10% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2dB and 4 dB) for Option 1, Option 2 of D2R preamble+1midamble and Option 3.
With up to 1% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2.8dB and 3.3dB) for Option 1, Option 2 of D2R preamble+1 midamble and Option 3.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <5*10^3 ppm
With up to 10% SFO, achieving the required accuracy necessitates more than 20 SFO hypotheses at the reader side for Option 1 and 10 SFO hypotheses are sufficient for Option 3 of D2R preamble + postamble. But for Option 3 reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc. 
With up to 1% SFO, 4 SFO hypotheses are sufficient for Option 1 to achieve the required accuracy.

For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieves a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.


Agreement
For the CFO calibration signal, which is required only for device 2b to reduce the frequency offset range and the guard-bandwidth of D2R transmission, the following observations are captured in TR 38.769:
Source [3, Huawei] report that a single-tone RF signal is used as the CFO calibration signal, it is not a part of time acquisition signal and can be transmitted as an optional R2D signal after the PRDCH transmission. 
Sources [2, Ericsson], [19, Panasonic] and [20, OPPO] report that additional synchronization signal is needed. 
[OPPO] state the R2D timing acquisition signal may not be sufficient or may not be usable for CFO calibration since a reference frequency is needed when separate LOs are used for Tx and Rx in device 2b.
Sources [7, Samsung], [9, vivo], [30, Qualcomm], [36, Apple] report that additional synchronization signal is needed if the synchronization for carrier frequency using R2D signal/channel does not provide required functionalities for device 2b.
Source [5, CMCC][31, MTK] report that it may not be possible to achieve enough frequency accuracy (0.01 ppm) even after CFO calibration based on R2D time acquisition signals for coherent detection at reader especially when the D2R data rate is low.

Agreement
For device 2b, a signal for CFO calibration should be provided to synchronize / calibrate the device clock for LO for carrier frequency (Clock purpose #5) to achieve the accuracy after clock sync / calibration at device side captured in Table 5.2.3-1.
Frequency calibration at device 2b is beneficial at least to reduce the guard-bandwidth of D2R transmission.

Agreement
Adopt the updates documented in R1-2410653 for section 6.2 of the TR38.769. 

Agreement
Adopt following update to the TP agreed on Monday

Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
[omit unchanged part]
For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception. 
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.

Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieve a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc
Source [7, Samsung] observes that the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception.

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Source [37, MediaTek] reports that transmitting 96-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 1000 ppm, and transmitting 1000-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 100 ppm.
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.

Agreement
Following observations on R2D clock-acquisition part are captured in TR 38.769:
On impact/restriction of M values for the clock-acquisition part
9 sources [TCL, Nokia, Huawei, CMCC, ZTE, Apple, CATT, Mediatek, Qualcomm] provided observations on the impact/restriction of M values for the clock-acquisition part design requirements:
1 source [Nokia] observed that increasing value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length and use of   provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration. 
2 sources [TCL, Huawei] observed for option 1 of the clock-acquisition part design that no restriction is required to be placed on the M values. Furthermore, 1 source [Huawei] observed that the same 2 ON-OFF voltage (with the same duration) satisfies the FDR performance metric of less than 1% for different M values, e.g., M = 2, 6 and 24, where FDR is the False detection ratio (FDR), i.e. incorrectly calculating M, is the performance metric.
1 source [CMCC] observed that pattern of the clock-acquisition part is related to M chips per OFDM symbol and when M is small, the clock-acquisition part may cross multiple OFDM symbols, and the CP insertion may degrade the timing acquisition performance.
1 source [ZTE] observed that with option 2, the duration of the clock-acquisition part remains consistent across all M values, at least three OFDM symbols maybe required for clock-acquisition part and it maybe not as efficient as option1
1 source [Apple] observed that among the two options studied for the clock-acquisition part, option 2 provides increased robustness, especially in case of large value of M, when compared to option 1 and potentially increase the detection performance of the clock-acquisition part. 
1 source [CATT] observed that if the chip duration is variable based on the M value used for OOK-4 waveform, the detection performance would be limited by the received SINR of the CAP with clear transition of the rising and falling edges.
1 source [Qualcomm] observed that the option 1 with M>1 has shorter duration of clock acquisition part than M=1 and worse timing acquisition accuracy. At least part of PRDCH following the clock acquisition part may need to be used to improve the timing acquisition. Furthermore, the larger M (e.g., M>4) with small chip duration is more sensitive to the SFO accuracy and the restriction of M for the clock acquisition part may be needed.
1 source [Mediatek] further observed that different M values may impact the chip accuracy obtained by the clock acquisition part.

On impact of CP insertion/handling on the clock-acquisition part
10 sources [TCL, CMCC, ZTE, Samsung, Vivo, CATT, NTT Docomo, Qualcomm, Mediatek, Spreadtrum] observed that the CP insertion/handling may impact the design requirements of the clock-acquisition part:
1 source [CMCC] further observed that when the clock-acquisition part occupies more than one OFDM symbol, ON-OFF state transition around CP can avoid the error rising or falling edges due to the CP insertion.
1 source [ZTE] further observed that to mitigate the impact of the CP in the clock-acquisition part for large M values, it can reuse the CP handling method for PRDCH 
1 source [Samsung] further observed that CP insertion/handling on the clock-acquisition part can cause false rising/falling transition and, therefore, the clock acquisition part should be designed such that it does not incur a false rising or falling edges due to CP insertion when CP-OFDM is used for OOK signal generation.
1 source [vivo] further observed that CP insertion/handling on the clock acquisition part will impact the chip duration estimation accuracy. It is further observed that for CP handling, device may not be able to count the clock and estimate OFDM symbol duration accurately until the clock acquisition part if the start indicator only includes a single ON-OFF transmission. 
1 source [CATT] further observed that the SER will be degraded due to uneven chip interval when the CP is inserted within an OFDM symbol, where SER refers to the number of samples which is mismatched for comparing to the total number of samples in a chip.
1 source [NTT Docomo] further observed if CP insertion would cause false rising/falling edges, accuracy of timing acquisition may be impacted.   
1 source [Mediatek] further observed that the issues of chip extension, false raising/falling transition, and additional raising/falling transition caused by CP insertion/handling considering different M values will impact the chip accuracy obtained by the clock acquisition part.
1 source [Spreadtrum] further observed that the design of clock acquisition part should consider that CP insertion does not cause a false rising or falling edges and does not cause different length of multiple high / low voltages within the clock acquisition part when the clock acquisition spans multiple OFDM symbols.
1 source [Huawei] observed CP insertion/handling may not impact the design requirements of the clock-acquisition part

Agreement
For the D2R preamble design, following aspects have been studied and can be captured in the TR 38.769:
Autocorrelation Property
10 sources [Nokia, Huawei, CMCC, Xiaomi, CATT, Oppo, Ericsson, NTT Docomo, Qualcomm, ZTE] observed that the signal should have good autocorrelation properties for accurate peak detection based on the signal correlation at the reader 
Cross-correlation Property
7 sources [Nokia, CMCC, Oppo, Ericsson, Qualcomm, ZTE, CATT] observed that the signal should have good cross-correlation properties if multiple D2R preamble sequences are considered (e.g. for multiple access schemes (if supported) for D2R transmissions). 
Line coding
1 source [Nokia] observed that line coding may impact the autocorrelation property of the sequence. 
1 source [Huawei] observed that for D2R preamble, to apply backscattering, line coding can help improve the detection performance based on shifting the D2R signal’s frequency location away from the carrier wave
Sequence Types (not limited to below types only)
M-sequence
3 sources [Nokia, Vivo, Xiaomi] observed that m-sequence can be considered for D2R preamble mainly owing to good correlation properties.  
Golay sequence
4 sources [CMCC, Vivo, Xiaomi, Samsung] observed that Golay sequence can be considered for D2R preamble mainly owing to good correlation properties and availability of large number of distinct sequences and complementary pairs.  
Walsh sequence
1 source [Oppo] observed that Walsh sequence can be considered as a candidate for D2R preamble thanks to its good auto/cross-correlation property and flexible length
General Observations
1 source [Huawei] observed can achieve 0.97% residual SFO with 98% probability under -2.5dB SNR and 0.1% MDR with [-1/8, 1/8] chip timing error with 99.05% probability under -2.5dB SNR with D2R preamble including 2-parts with clock-like sampling frequency signal and timing-acquisition signal, having 32-length ‘1’ sequence (encoded to 64-chip Manchester code) and 32-length sequence (encoded to 64-chip Manchester code), respectively.
4 sources [TCL, CMCC, ZTE, Vivo] observed that for D2R preamble with binary signal, the timing synchronization performance is highly related to the sequence length of the preamble. Furthermore, 1 source [CMCC] observed that to achieve a BLER performance at 10%, the timing synchronization error should be less than 10%. Furthermore, 1 source [ZTE] observed that the channel estimation performance is also highly related to sequence length. 1 source [ZTE] observed that using a 32 bits preamble provides ~8 dB, ~5 dB performance gain than using 8 bits, 16 bits preamble, respectively. And using a 64 bits preamble provides ~2.5dB performance gain than using a 32 bits preamble.
1 source [Ericsson] observed that for D2R preamble with binary signal, normalized SFO estimation error of less than 10% can be achieved with a training sequence length 64 or longer. The simulated D2R preamble consisting of a Golay complementary pair can tolerate SFO up to 1% (AWGN) with up to 1 dB loss in performance for a sufficiently long preamble sequence length (32 or greater).

Agreement
For determining the end of PRDCH at the device, following two options are studied and captured in the TR 38.769:
Option 1: TBS information (via implicit/explicit L1 R2D control information)
Option 2: Postamble (at the end of PRDCH) 
14 sources [Nokia, Huawei, ZTE, CMCC, Samsung, Ericsson, Oppo, LGE, Qualcomm, Spreadtrum, Mediatek, Cewit, Ericsson, vivo] provided following observations on the above two options for determining the end of PRDCH:
3 sources [Nokia, Huawei, ZTE] observed that option 2 provide two benefits, namely, the variable payload length and to provide timing acquisition before the subsequent transmission of either PDRCH or PRDCH, thus improving the detectability at both reader and the device, respectively. Furthermore, 1 source [Huawei] observed that R2D postamble indicates the TBS with high efficiency for small packets by avoiding a large padding overhead, unlike option 1, which may require devices to perform blind detection of different PRDCH formats (if supported) and the overhead caused by the inclusion of a R2D postamble does not exceed 20% for even the smallest of message sizes and may be less than the signaling overhead caused by using a dedicated TBS indicator
1 source [CMCC] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead, while for large payload size with more bits, the resource overhead of postamble is smaller.
1 source [vivo] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead.
1 source [Samsung] observed option 2 is not strictly required, however, given the possible clock drift at a device, it may be still beneficial to also attach postamble at least for the determination of the end of PRDCH at a device. 
3 sources [Oppo, Spreadtrum, CEWiT] observed that with option 2, the false detection may be higher for shorter postamble. Source [OPPO[ observed that in contrast to option 2, it is more reliable and efficient to indicate TBS with control information in option 1
2 sources [LGE, vivo] observed that if a message type or a command ID is included in L1 control information and implicitly indicates a known size of a fixed TB, then there is no need for either option 1 or option 2
2 sources [Qualcomm, vivo] observed that option 1 has the advantages of avoiding blind detection of postamble and providing the power saving for non-target devices to skip the R2D detection.
1 source [MediaTek] observed that option 1 is feasible for the device to avoid the unnecessary reception of a TB with a specific size and thus enable power saving, e.g., when the TB has a size exceeding the allowance of the device remaining power.
1 source [Ericsson] observed option 2 is not strictly required if the end of PRDCH can be explicitly indicated by R2D control information, and it is subject to the miss-detection rate. It may be beneficial if a PRDCH postamble can serve as an additional timing acquisition signal prior to a PDRCH transmission.

Agreement
For D2R scheduling, midamble (if supported) related information can be explicitly/implicitly indicated via corresponding PRDCH.

Agreement
Following observations on R2D clock-acquisition part are additionally captured in TR 38.769:
On purpose of SFO estimation/correction based on the clock-acquisition part
3 sources [Nokia, CATT, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Nokia] observed that the length of preamble sequence may need to consider also the robustness against SFO
1 source [CATT] observed that device 2a/2b may require higher synchronization accuracy for signal transmission or backscattering and therefore, the design of CAP may be required to accommodate the requirement of additional frequency synchronization and clock calibration for Device 2a/2b. 
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for SFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support SFO correction.
On purpose of CFO estimation/correction based on the clock-acquisition part
2 sources [Ericsson, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Ericsson] observes that the clock-acquisition part can be utilized to solve the frequency synchronization problem without impacting the time-domain sequence, for example by transmitting in some frequency resources and it can be a harmonized solution for both chip duration indication and device frequency synchronization. However, it is further observed that if the time interval between an R2D transmission and the corresponding D2R transmission and if the device loses the timing obtained from the R2D timing acquisition signal due to timing drift at the time for the D2R transmission, then an additional synchronization signal is needed
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for CFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support CFO correction.


WI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#120 (Athens, Greece, Feb 17th – 21st, 2025)
SIP related Agreements
Agreement
For the SIP of R-TAS, for providing the start of the R2D transmission, one single design based on Option 1 is supported and further down-selection to be done among Alt 1 and Alt 2 :
Option 1: ON-OFF transmission with following alternatives:
Alt 1: A single ON-OFF transmission with pre-defined duration for each of the ON-OFF, where ON and OFF may have same or different durations
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt1
Alt 2: A multi-ON-OFF transmission with pre-defined duration for each of the ON(s)-OFF(s), where different ON and different OFF may have same or different durations and different parts may have same or different duration
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt2
Only a single fixed value for entire duration of SIP of R-TAS is supported, which is independent of the value of “M” used in CAP and PRDCH
Note: Specific design and duration for SIP of R-TAS are further discussed, and companies are encouraged to evaluate the designs in terms of target MDR of [10%] for a FAR up to [1%] and at least following assumptions are used:
MDR refers to the probability that SIP is not detected when it was actually transmitted
FAR probability that the receiver incorrectly detects SIP when SIP was not transmitted
Energy/edge detection-based method is the baseline assumption for evaluation purpose
Continue discussion on necessary details for simulation assumptions

Agreement
For the SIP of R-TAS, down-select among the following candidates:
Alt 1 (Single ON-OFF transmission)
Alt 1-1: ON followed by OFF with same duration for both
Alt 1-2: ON followed by OFF with a duration ratio of 1:[2,3]
Alt 1-3: ON followed by OFF with a duration ratio of [2,3]:1
Alt 2 (Multi-ON-OFF transmission)
Alt 2-1: A number of repetition instances of Alt 1-1 or Alt 1-2 or Alt 1-3
Alt 2-2: ON-OFF-ON (duration of ON and OFF can be different)
Alt 2-3: OFF-ON-OFF (duration of ON and OFF can be different)
Alt 2-4: Combination of single instance of Alt 1-1 and single instance of Alt 1-2
For the evaluation purpose, for both options, candidate values related to duration are considered:
Entire duration of SIP: 1/2 OFDM symbol duration or 1 OFDM symbol duration (including clarifying whether OFDM symbol duration includes CP); additional durations can be considered and reported by companies with justification 
Companies to report the exact duration(s) for ON or OFF
Companies are encouraged to report at least the following details for the evaluations:
Baseline assumption is that RF transmission is not present; companies can report other consideration
For FAR calculation, whether noise and/or PRDCH transmission is considered
Details on threshold detection method including whether/how threshold detection training is used based on the proposed design alternative or not
BW assumptions for RF-ED and BB-LPF
Target MDR of up to 1% for FAR of up to [1%, 10%]

CAP related Agreements
Agreement
For the CAP of R-TAS, the starting chip has a different voltage level compared to the end of the SIP of R-TAS.

Agreement
For the design of the CAP of R-TAS, at least 2 transition edges in same direction are included, i.e. at least two transitions from “OFF” chip to “ON” chip or two transitions from “ON” chip to “OFF” chip.

Agreement
For the CAP of R-TAS:
Candidate values for maximum duration of CAP to be further down-selected to one value from : 1.5 OFDM symbol duration, 2 OFDM symbol duration, 3 OFDM symbol duration
For option 1 for CAP of R-TAS from TR 38.769, maximum duration is applicable to minimum value of M to be supported, and the CAP duration becomes shorter with increasing value of M
FFS: whether the number of ON/OFF transmissions in the CAP is fixed or not fixed
For option 2 for CAP of R-TAS from TR 38.769, maximum duration is the only (constant) duration that is applicable for all the M values to be supported
Down-selection between option 1 and option 2 for CAP of R-TAS from TR 38.769 by RAN1#120-bis
FFS: Values of M to be supported


R2D Midamble related Agreement
Agreement
R2D transmission does not include a midamble.

D2R X-amables related Agreement
Agreement
For D2R preamble design, the functionalities of timing acquisition, SFO estimation/time tracking and channel estimation should be supported
For D2R midamble design, the functionalities of SFO estimation/time tracking and channel estimation should be supported
D2R midamble can be transmitted at the end of the PDRCH transmission. If it is at the end, it is not designed for being used for indicating the end of PDRCH transmission
FFS: condition(s) and/or indication where the D2R midamble is present or not

Agreement
For D2R x-ambles:
Following is considered as the types for base sequence and to be further down-selected:
Option 1: M-sequence 
Option 2: Golay sequence
Note: Above doesn’t preclude an additional part for preamble, e.g. with ON and/or OFF transmission, if needed/supported
FFS: Whether/what multiple sequences (using same base sequence type) are supported
Note: This in no way implies that there is going to be CDMA between D2R x-ambles
For evaluation purpose, companies are encouraged to consider following:
Performance at least in terms of autocorrelation/cross-correlation property, SFO estimation/Timing accuracy, SNR for target PDRCH BLER of [1%, 10%]
Report presence and time-domain resource(s) x-ambles
Report sequence type(s) and length(s) for x-ambles
Following format can be considered for reporting the evaluation results



RAN1#120bis (Wuhan, China, April 7th – 11th, 2025)
R-TAS related Agreements (including SIP and CAP)

Agreement
For the pattern of SIP of R-TAS, only the following 2 alternatives are considered for further down-selection:
Alt 1-2: ON-OFF with a ratio of 1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration
Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration

Agreement
For CAP of R-TAS, following is adopted:
Option 1 for CAP of R-TAS from TR 38.769 is adopted where the CAP duration becomes proportionally shorter with increasing value of M, i.e. if for , duration is  OFDM symbol long, then for , duration is  OFDM symbol long
Note: Duration without CP insertion is considered above, with CP insertion, the total duration may not be exactly proportional
Only following two alternatives for CAP pattern are considered for further down-selection to one alternative:
Alt 1: ON-OFF-ON-OFF
Alt 2: ON-OFF-ON


Agreement
For R-TAS, SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

D2R x-ambles related Agreements (including preamble and midamble)

Agreement
For D2R midamble, for determining the presence and location of midamble(s) at the device:
Reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information
FFS: details of signalling
FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end
Note: This does not preclude the support of having no midamble present in the D2R transmission

Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH

Agreement
For indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following is adopted:
Unit of interval is number of bits after FEC (if FEC is applied) and repetition (if repetition is applied)
FFS: the candidate values in terms of the unit of interval

RAN1#121 (St Julian’s, Malta, May 19th  – 23rd , 2025)
Agreement
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Agreement
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission.

Agreement
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between 0 1 0 0 1 1 1 (for 010 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Agreement
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, SIP duration of 1 2 OFDM symbols is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.
OPPO expressed the concern that the agremeent above has higher overhead and latency.

Agreement
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following interval values are adopted:
For bit duration of 266.67μs
I = 48 bits, 96 bits, 168 bits, 240 bits
For other supported bit durations of 266.67μs/Y
I = Y * {48, 96, 168, 240} bits
Values of Y: 2, 4, 8, 16, 32, 64, 192
For signaling via R2D control information, following is adopted:
1-bit length codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a 2-bit length codepoint 
Lowest to highest codepoint value indicates lowest to highest interval value 
1-bit length codepoint is used to indicate whether the midamble is present at the end or not, where “0” indicates no midamble present at the end and “1” indicates midamble present at the end
Note: if the indicated interval is longer than the number of bits after FEC (if FEC is applied) and repetition (if repetition is applied), and 1-bit length codepoint does not indicate midamble present at the end, then there is no midamble.
TDoc file conclusion not found
R1-2504864 FL Summary#5_AI_9_4_3_final.docx
3GPP TSG RAN WG1 #121		             R1-2504864
St Julian’s, Malta, May 19th – 23rd, 2025

Agenda Item:	9.4.3
Source: 	Moderator (Apple)
Title:	FL Summary#5 on timing acquisition & synchronization for Ambient IoT
Document for:	Discussion & Decision

Introduction & Work-Plan for RAN1#121
This document provides the feature lead summary on the offline discussions/inputs/proposals for AI 9.4.3 timing acquisition and synchronization signals for R2D and D2R for ambient IoT WI during RAN1#121. 

Contact Information
Please consider providing your company name, your name and email address to be able to reach for any potential offline discussions/contact regarding AI 9.4.3 on timing acquisition and synchronization for ambient IoT.



Work Plan
Issues for discussion/completion in this meeting are categorized as below:
High-priority issues:
Finalize SIP pattern by down-selecting between Alt 1-2 and Alt 2-4
D2R ambles:
Confirm WA  and finalize m-sequences corresponding to n =3 and n =5
Finalize interval values for D2R midambles and signaling framework
Medium-priority issues:
Conclude whether R2D postamble is supported and specified, or not
If there is still no consensus, then the natural outcome will be R2D postamble is not specified
Low-priority issues:
CAP related aspects
I don’t intend to spend much offline time, and hopefully as needed, we can quickly agree on this part during online session


(Closed) SIP of R-TAS







[Closed] 1st Discussion Round 
Table 2-1: Summary of views on alternatives for SIP



FL Observations:
Based on the contributions, Alt 1-2 has slightly higher majority support compared to Alt 2-4. However, in terms of simulation, 4 companies showed that Alt 2-4 performance better compared to Alt 1-2, especially in terms of MDR performance. On the other hand, 3 companies showed that Alt 1-2 performs better, especially  in terms of FAR, considering scenarios for evaluations including presence of other R2D transmissions. From FL perspective, basically, it is clear that MDR with Alt 2-4 is expected to be better than Alt 1-2 considering all scenarios and no assumption of any transmission before SIP. For FAR, mainly the issue is shown by proponents of Alt 1-2 under scenario when the last 3 OFF chips in SIP are not easily distinguishable. Based on agreed M values for PRDCH, this should not be the issue because effectively SIP with 1 OFDM symbol duration avoids that issue as it has 3 OFF chips at end with effectively M corresponding to 6. Such pattern of chips for that duration is not expected in other transmissions. Also, for M = 2 [16] shows that due to no particular assumption on any transmission before SIP, even with Alt 1-2, high FAR is shown.
Therefore, with consideration that no assumption on RF transmission before SIP is applied and at least 4 companies demonstrate via simulations that Alt 2-4 can work in all scenarios corresponding to PRDCH with all the agreed M values, following proposal is provided.

HP Proposal 2-1 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
 

Another additional aspect to clarify, based on the note in the endorsed TS by spec editor, whether/how the presence of SIP is detected need to be captured in the specification or not. Based on the contributions, only except 1 company, there is no explicit proposal to specify how the presence of SIP is detected by device. However, to further align understanding among companies, following question is drafted for your inputs.


Question 2-2 
Do you think that TS 38.291 needs to capture on how the presence of SIP is detected at the device or is it up to device’s implementation? 







[Closed] 2nd Discussion Round 
Regarding the SIP Pattern, at this stage, I don’t believe that reiterating known arguments will help move the discussion forward. Therefore, I’d like to request companies to only respond if they cannot live with a particular alternative. There is no need to restate preferences, as those are already well understood.

Question 2-2v1 
Do you have strong objections to either Alt 1–2 or Alt 2–4, such that you cannot accept it under any circumstances?


[Closed] 3rd Discussion Round 
Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with minimum allowed value of 0 and a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified




Proposal 2-3C 
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.


(Closed) D2R ambles 





[Closed] 1st Discussion Round 
FL observations
On Working Assumption Confirmation: Regarding the working assumption on supporting n=3 for D2R ambles, 5 companies explicitly discussed and proposed to confirm the WA, while 1 company explicitly proposed to not confirm the working assumption and rather agree on n=4. All the other companies that provided their views relayed to D2R ambles, although didn’t explicitly propose to confirm the WA, but based on the proposals, it is quite clear that they assume and consider WA to be confirmed. One company that proposes to change from n=3 to n=4 shows performance gain improvements with n=4. However, as discussed in RAN1#120bis, since n=5 is already agreed, therefore, the other value of n =3 was chosen based on reasonable performance gap, otherwise the benefit of supporting two lengths diminishes. Therefore, considering, all but one company, prefer to confirm WA, proposal 3-1 is provided. Also, only ~3 companies consider supporting different length combinations for midamble and preamble, however, majority of companies don’t see a motivation to support such a combination. Therefore, from FL perspective, we don’t need to further discuss that as it is not critical or necessary issue. 

HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH



Sequence Generation: Below tables summarizes the sequences considered by companies for n=3 and n=4. In terms of exact sequences, there is almost no common sequence considered by multiple companies. However, in terms of polynomial used for sequence generation, companies mainly considered between 2 alternatives, each for n = 3 and n=4. Companies have also provided evaluations and generally all the proposed polynomials have good performance, primarily in terms of good correlation properties and peak sidelobe level. Therefore, from FL perspective, as a starting point, single polynomial for n =3 and n =4 is proposed in proposal 3-2. Furthermore, in terms of initial state, most companies did not discuss exact values, except for 3 companies. One company proposed to not fix the initial state and rather specify an association with frequency shift to allow for multiple sequences. However, considering limited time and no clear motivation without CDM, FL suggestion is to consider fixed initial state and support only single sequence for each of the n value. Therefore, for initial state, also FL’s suggestion is to adopt 1 fixed state and based on that single fixed sequence for each of n can be specified. For n =3, based on majority x³ + x² + 1 can be considered and furthermore with initial state of 010, it provides best PSL=1 among all the other sequences. Accordingly, proposal is provided. For n =5, there is equal support for the two polynomials. In terms of performance, both sequence is almost similar. For polynomial x⁵ + x³ + 1, with initial state of 01001, better PSL is achieved in comparison to initial state of 00001. Therefore, at least in case of this polynomial, initial state of 01001 is only considered for further discussion. For polynomial x⁵ + x² + 1, only initial state of 11000 is provided. Accordingly, proposal is provided with two options for further down-selection. 

Table 3-1: Summary of Sequence Generation from Companies


HP Proposal 3-2 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 0101
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Down-select one option from the two options in RAN1#121:
Option 1: 
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1
Option 2: 
Polynomial: x⁵ + x² + 1
Initial State: 11000
Resulting Sequence: 1 1 1 1 1 0 0 1 1 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 01




Midamble intervals: ~11 companies provided exact interval values; however, the candidate set of values are quite divergent. Depending on time variation in the channel and SFO/timing estimation requirement, companies justify multiple set of values. Based on the contributions, considering only time variation in the channel, interval in order of ~275 bits for a bit duration of 266.67μs is reasonable. However, considering SFO/timing estimation requirement and the maximum remaining bits after the last midamble, interval in the order of ~30 bits for length 7 of preamble/midamble seems reasonable. Therefore, considering above and two different lengths of preamble/midamble, FL’s recommendation is to at least agree on at least 4 values within the range of 25-275 bits with a gap of 75 bits. Furthermore, in order for reader to have flexibility, no specific association between length of preamble/midamble needs to be specified and leave it up to signalling as determined by reader. Based on above, proposal 3-3 is provided. 

HP Proposal 3-3 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 25 bits, 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits}
For other supported bit durations of 266.67μs/Y
I = Y * {25 bits, 100 bits, 175 bits, 225 bits}




Signaling for preamble/midamble: Regarding the signaling framework, companies have considered mainly two different methods to signal length of preamble/midamble and midamble interval. One method is joint indication of the length and midamble interval, while the other method is the separate indication, i.e. separate bitfield for length indication and separate bitfield for midamble interval. Considering the argument provided under 3) to allow more flexibility to reader and not necessarily specify certain combinations of length and corresponding midamble intervals, FL’s recommendation is to adopt separate indication for preamble/midamble length and midamble interval. Another aspect that companies discussed is whether an explicit indication for midamble presence at the end is needed or not and if needed, how to indicate it. Majority companies (~9) think that it is not needed for the reader to explicitly indicate it, while still quite some companies (~7) think that for device to easily determine the presence of midamble at the end, it can be explicitly signaling, and most preferred option is via separate 1-bit indication. From FL perspective, one key motivation to indicate midamble presence at the end is to avoid large number of bits after midamble (that is not at the end). However, in proposal 3-3, the values proposed for interval  to avoid large number of bits after midamble, therefore, such explicit indication is not really necessary. Also, in terms of generally indication the presence/absence of midamble, ~2 companies consider explicit indication. However, it is argued that if the midamble interval indicated is longer than TBS, then this is an implicit indication to the device that midamble is not inserted. Based on above, proposal 3-4 is provided.

HP Proposal 3-4 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Closed] 2nd Discussion Round 
Based on inputs from 1st round, proposals for D2R ambles are update accordingly below:
Proposal 3-2A 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: 010
Resulting Sequence: 0 1 0 0 1 1 1
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1







Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits}
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}





Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
FFS: Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH



[Open] 3rd Discussion Round 

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}









Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 3-5
For m-sequence with n =3  for D2R ambles, adopt initial State 100 and resulting sequence of  1 0 0 1 1 1 0


[Closed] 4th Discussion Round 

Proposal 3-5A (to be updated with one state and one resulting sequence) 
For m-sequence with n =3  for D2R ambles, adopt [initial State 100 and resulting sequence of      1 0 0 1 1 1 0 or initial State 010 and resulting sequence of 0 1 0 0 1 1 1]




(Closed) R2D Postamble

[Closed] 1st Discussion Round 
Table 4-1: Summary of views on R2D postamble


FL observations
Based on above table, from FL perspective, there is almost no change in the situation since last two meetings. From that point of view, it is hard to converge one way or other. Moreover, it seems that for purpose of indicating the end of PRDCH transmission, already RAN2 agreement could be applied, as below by Vivo and Oppo:


With all the above considerations, FL proposal is to conclude that there is no consensus to specify R2D postamble. 

Proposed Conclusion 4-1 
There is no consensus to specify R2D postamble



[Closed] 2nd Discussion Round 

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips



[Open] 3rd Discussion Round 

Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips








[Open] 4th Discussion Round 
Proposal 4-2B 
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips regardless of the CP handling method 
R2D padding duration is determined after R2D postamble insertion
 




(Closed) CAP related issues

[Closed] 1st Discussion Round 
FL observations
In RAN1#120bis, we agreed the CAP pattern and the agreement also included the text that it is supported for all M values corresponding to PRDCH. Based on FL understanding, we don’t necessarily need any additional agreement. However, ~10 companies discussed that in their contributions for this meeting and based on their understanding, the agreement didn’t really explicitly cover the M value for CAP. Therefore, based on the contributions, all the companies that discussed M values for CAP propose that they are same as for PRDCH. Therefore, following proposal is provided:

Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 


Another aspect which ~4 companies discussed is related to CP handling for CAP. Mostly, the potential issue discussed is when M=24 is applied. For this case, companies have proposed adopting CP handling based on option1 from CP handling related agreement in 9.4.1. Also, one company pointed out no special handling is needed. From FL perspective, effectively, all companies that discussed this issue don’t necessarily mean to apply special handling for CAP in comparison to PRDCH but rather suggest adoption CP handling method with option 1. Therefore, for this agenda, at this point, we don’t need to additional discuss CP handling and rather wait for the discussion to conclude in 9.4.1 If needed, based on outcome of the discussion in 9.4.1 on CP handling method, we can further consider, if any additional discussion is needed for CAP or not














Proposals for offline sessions
1st offline session (Tuesday, May 20, 2025)

Proposal 2-3 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
M value for the variable part chips is up to reader implementation
Note: Detection method of SIP presence at the device is not specified












Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence generation with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 or 1 0 0 1 1 1 0
For n = 5, adopt m-sequence generation with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3A 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100/96 bits, 175/160 bits, 225/224 bits
FFS: whether additional values (no more than 4 values) needed from candidate set {50 bits, 75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} including the case where a interval value could indicate presence of midamble at the end
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}
Whether 1-bit long code-point is used to indicate the presence of midamble at the end, where “0” indicates midamble not present at the end of PRDCH and “1” indicated midamble present at the end of PRDCH


Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF ] chips





2nd offline session (Thursday, May 22, 2025)

Proposal 3-5A (to be updated with one state and one resulting sequence) 
For m-sequence with n =3  for D2R ambles, adopt [initial State 100 and resulting sequence of      1 0 0 1 1 1 0 or initial State 010 and resulting sequence of 0 1 0 0 1 1 1]

(updated) Proposal 4-2B 
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips regardless of the CP handling method, i.e. additional 2 ON chips at end are there for M=24
R2D padding duration is determined after R2D postamble insertion
Supporting R2D postamble should not imply that device is mandated to use R2D postamble for detecting the end of PRDCH transmission, e.g. other solutions based on CRC check and/or higher-layer information could be used, but are not mandated for the device





3rd offline session (Thursday, May 22, 2025)

Proposal conclusion 4-2D-v3 (same as Chair’s)
No additional work needed in RAN1 for determining the end of PRDCH transmission.
Note: RAN1 can rely on higher-layer information for determining the end of PRDCH transmission
RAN1 sends an LS to RAN2 to confirm RAN1 understanding above
Concerns: Interdigital, Huawei, Offino, Tejas, Xiaomi, CMCC, LGE, Futurewei, NEC, Sharp, ZTE, Lenovo

Or 
Proposal 4-2D-v1
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips
Note: For M=24, 2 ON chips at the end of OFDM symbol for CP handling are in addition to R2D postamble, but not constitute as part of the R2D postamble
R2D padding duration is determined after R2D postamble insertion
Note: It is up to device implementation on whether/how R2D postamble and/or higher-layer information based on following agreement from RAN2 is used for determining the end of PRDCH transmission

Concerns: Qualcomm, Docomo, LGE, Vivo


Proposals for online session
1st  online session (Monday, May 19, 2025)
HP Proposal 2-1a 
For SIP of R-TAS, SIP patten with Alt 2-4 is adopted, i.e. ON-OFF-ON-OFF with a ratio of 1:1:1:3 
Note: Detection method of SIP presence at the device is not specified


HP Proposal 3-1 
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Proposal 5-1 
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission 













2nd online session (Tuesday, May 20, 2025)
Proposal 2-3A 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with a maximum allowed value of 1 OFDM symbol
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified


Proposal 3-2B 
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between  0 1 0 0 1 1 1 (for 0101 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Proposal 3-3B 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = [25 bits or 50 bits], 100 bits, 175 bits, 225 bits
FFS: whether/what additional values (no more than 4 values) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {[25 bits or 50 bits],100 bits, 175 bits, 225 bits}

Proposal 3-4A 
For D2R preamble and midamble related signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits and 3 bits
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]

Proposal 4-2 
R2D postamble is specified with fixed length of [4 OFF] chips

3rd online session (Wednesday, May 21, 2025)
Take Proposal 2-3Bv1 or Proposal 2-3Bv2  

Proposal 2-3Bv1 
For SIP of R-TAS, following design is adopted (based on combination of Alt 1-2 and Alt 2-4) with following two parts:
A fixed duration part of 1 OFDM symbol duration with ON-OFF chips and corresponding ratio of 1:3
M = 4 for the fixed part chips
A variable duration part with ON-OFF chips and corresponding ratio of 1:1  and it precedes the OFDM symbol with the fixed duration part
Duration of variable part is up to reader implementation with minimum allowed value of 0 and a maximum allowed value of 1 OFDM symbol 
It is up to reader’s implementation to align with the start of OFDM symbol boundary for the symbol with variable part 
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, minimum SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

Proposal 2-3Bv2 
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, SIP duration of 1 2 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.



Proposal 3-3C 
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, at least following interval values are adopted:
For bit duration of 266.67μs
I = 100 bits, 175 bits, 225 bits
FFS: whether/what additional value(s) needed from candidate set {75 bits, 125 bits, 150 bits, 250 bits, 275 bits, 500 bits, 750bits} 
For other supported bit durations of 266.67μs/Y
I = Y * {100 bits, 175 bits, 225 bits}
For signaling via R2D control information, following is adopted:
1-bit long codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a codepoint with X number of bits corresponding to a bit duration, where value of X is to be down-selected between 2 bits (if up to 4 interval values per bit duration adopted) and 3 bits (if up to 8 interval values)
Lowest to highest codepoint value indicates lowest to highest interval value 
Note: Bit duration indication is separately discussed under agenda 9.4.2
[1-bit long codepoint is used to indicate whether the midamble is presented at the end or not, where “0” indicates no midamble present at the end and “1” indicates long midamble present at the end]


Proposal 4-2A 
R2D postamble is specified with fixed length of [5 ON] chips


4th online session (Thursday, May 22, 2025)
Proposal 4-2C: Take v1 or v2

Proposal 4-2C-v1
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips
Note: For M=24, 2 ON chips at the end of OFDM symbol for CP handling are in addition to R2D postamble, but not constitute as part of the R2D postamble
R2D padding duration is determined after R2D postamble insertion
Note: Exact method for determining the end of PRDCH at the device is not specified
It is up to device implementation on whether/how R2D postamble and/or higher-layer information based on following agreement from RAN2 is used for determining the end of PRDCH transmission


Proposal 4-2C-v2
There is no consensus to specify R2D postamble
Note: RAN1 can rely on higher-layer information for determining the end of PRDCH transmission based on following agreement from RAN2

 
Proposal 3-5B 
For m-sequence with n =3  for D2R ambles, adopt initial State of 100 and resulting sequence of      1 0 0 1 1 1 0


Contributions in RAN1#121


Appendix
Revised WID (RP-243326): RAN1 Scope & Objectives 
General Scope
The definitions provided in TR 38.848, TR 38.769, and decisions, etc. made during the Rel-19 SI in RAN WGs are taken into this WI, and the following is the exclusive general scope:
The overall objective shall be to standardize the following Ambient IoT device:
Device 1: ~1 µW peak power consumption, has energy storage, RF envelope detector receiver, initial sampling frequency offset (SFO) up to 10X ppm, neither R2D nor D2R amplification in the device. The device’s D2R transmission is backscattered on a carrier wave provided externally.
Deployment scenario 1 with Topology 1, according to D1T1-B. 
FR1 licensed spectrum in FDD, with R2D in DL spectrum and D2R and CW in UL spectrum.
Spectrum deployment in-band to NR and standalone, with A-IoT BS located indoor.
Traffic types DO-DTT, DT, for rUC1 (indoor inventory) and rUC4 (indoor command). 
Carrier wave transmission for waveform 1 only, without hopping, per the following cases in TR 38.769:
Case 1-4 for D1T1-B
Proximity determination via Solution 1 in TR 38.769 only.
Device (un)availability via Direction 1 in TR 38.769 only.

WGs begin their discussions from the decisions already made in TR 38.769, with the following refinements for the scope: 

The following objectives are set, within the General Scope:
RAN1 scope:
PRDCH and PDRCH, which are the only physical channels in R2D and D2R, respectively.
R2D and D2R signal(s)
Multiplexing/multiple access in R2D is by only TDMA, and in D2R is by only TDMA and FDMA.
R2D supports only OOK-4 modulation, one solution for CP handling. D2R backscattering supports only OOK and BPSK modulations.
R2D transmission supports only the Manchester line code in TR 38.769
D2R transmission supports:
Either the Manchester line code in TR 38.769 or no line code (one to be down-selected); and
A corresponding small frequency shift method according to the options in TR 38.769.
R2D does not support FEC. D2R supports only convolutional code with generator polynomials as per TS 36.212. Applying or not applying the FEC to D2R is specified by ensuring it is under the reader control and applies to all devices targeted by the reader.
PRDCH and PDRCH both support transmission without CRC, and with CRC as per the generator polynomials in TS 38.212 for 6-bit CRC and 16-bit CRC. Cases to use which length of CRC, or no CRC, to be decided in RAN1.
D2R supports physical layer repetition transmission. R2D does not support physical-layer repetition transmission. 
RAN2 scope:
Specify the necessary functions and procedures for an Ambient IoT compact protocol stack and lightweight signalling procedure to enable DO-DTT and DT data transmission:
A-IoT Paging, including subsequent paging for the same service. Support the options that a paging message contains one identifier, and that a paging message contains no identifier. 
Note: RAN2 aims to design a paging message format such that multiple identifiers can be contained in one paging message, for forward compatibility purposes.
A-IoT Random access, including re-access for failure handling. Contention-based and contention-free cases are supported. For the contention-based random access, only Solution 1 (3-step only) is included.
A-IoT data transmission, including data (re-)transmission for failure handling. Segmentation is supported at least in D2R.
Only MAC layer is included
RAN3 scope: 
Specify necessary architectural aspects, and signaling and procedures between A-IoT RAN and A-IoT CN to support the A-IoT functions, assuming an architecture of aggregated gNB, including:
Inventory and command operations
Device location reporting at reader ID granularity
Note: The above A-IoT functions are supported over the existing NG interface, based on architecture(s) defined by RAN3/SA2.
RAN4 scope:
Specify RF requirements for Ambient-IoT BS, device 1, and CW
RF requirements for Type 1-C Ambient-IoT BS
RF requirements for device 1
RF requirements for CW
Specify RRM core requirements for device 1, if necessary
Study and develop OTA test methodology for A-IoT device 1
Consider test methods specified in TR 38.870 as starting point. Take test system reuse, test system complexity and test time into account, when developing test methods suitable for Ambient IoT.
Develop the preliminary Measurement Uncertainty (MU) assessment for the test system
Use band n8 as an example band

Note 1: Coordination with SA2 and SA3 is expected. Updates to the WID objectives should be considered if needed.

Note 2: This WI shall target for an IoT segment well below the existing 3GPP IoT technologies, e.g. NB-IoT, eMTC, RedCap, etc. The WI shall not aim to replace existing 3GPP LPWA technologies.

SI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#116 (Athens, Greece, February 26th – March 1st, 2024)
Agreement
At least the following time domain frame structure is studied for A-IoT R2D and D2R transmission.
For R2D transmission,
A R2D timing acquisition signal (e.g. R2D preamble) is included at least for timing acquisition and for indicating the start of the R2D transmission in time domain.
For D2R transmission,
A D2R timing acquisition signal (e.g. D2R preamble) is included at least for timing acquisition and for indicating the start of the D2R transmission in time domain.
FFS other necessary component(s), e.g. midamble, postamble, periodic sync signal, control fields, guard period


RAN1#116bis (Changsha, Hunan Province, China, April 15th – April 19th, 2024)

Agreement
To determine or derive the end of PRDCH transmission, study at least following options:  
Option 1: R2D postamble immediately follows the PRDCH to indicate the end of the PRDCH.       
Option 2: Based on R2D control information.

Agreement
For the reader to acquire the end of PDRCH transmission, study at least following options:  
Option 1: D2R postamble immediately follows the PDRCH
Option 2: Based on control information

Agreement
For D2R transmission, study the necessity of midamble at least for the purpose of performing timing/frequency tracking or channel estimation or interference estimation, considering at least the following: 
Modulation and Coding schemes, e.g., data modulation, line/channel coding 
Receiving methods, e.g., coherent or non-coherent
D2R transmission length/packet size
Midamble overhead
Timing/frequency accuracy
Phase accuracy

Agreement
RAN1 study the R2D transmission without midamble as the baseline if Manchester encoding is used.
FFS the necessity for the R2D transmission with midamble if PIE is used. 

Agreement
For the R2D timing acquisition signal immediately preceding the transmission of a physical channel, study a preamble with at least two parts which includes a start-indicator part and a clock-acquisition part, where the start-indicator part immediately precedes the clock-acquisition part:
Start-indicator part provides the start of the R2D transmission
FFS: Details of start-indicator part
Clock-acquisition part provides at least the chip synchronization of the subsequent physical channel transmission
FFS: Details of clock-acquisition part, e.g. structure, encoding, length, etc. 
FFS: Methods to determine chip duration of the subsequent physical channel transmission 
FFS: Other functionalities
Note: the preamble is considered not to be part of a physical channel
FFS: other part(s) of the preamble, if any 
FFS: whether the above clock acquisition is sufficient for all devices
FFS: how to make the preamble compact

Agreement
For D2R, a preamble preceding each PDRCH transmission is studied as the baseline at least for the D2R timing acquisition signal:
Preamble is not part of PDRCH
FFS: Other functionalities of the preamble

Agreement
Reference signals including at least DMRS, PTRS, CSI-RS/TRS, are not further studied for R2D.

Agreement
Reference signals including DMRS, PTRS, SRS, are not further studied for D2R
Note: This doesn’t preclude the possibility to study preamble, midamble, postamble for different purposes, e.g. channel/interference estimation and/or proximity determination


RAN1#117 (Fukuoka City, Fukuoka, Japan, May 20th – 24th, 2024)

Agreement
For the start-indicator part of the R2D time acquisition signal, study the two options below:
Option 1: ON/OFF pattern i.e. high/low voltage transmission 
Option 2: OFF pattern, i.e. low voltage transmission 

Agreement
For R2D, the clock-acquisition part of the R2D time acquisition signal is used to determine the OOK chip duration
FFS: Pattern design to support determination of chip duration


RAN1#118 (Maastricht, NL, August 19th – 23rd,  2024)

Agreement
For each D2R transmission, no separate part for start-indicator is considered for the preamble preceding the PDRCH.

Agreement
For D2R transmission, preamble preceding the PDRCH is studied also for the potential additional functionalities:
SFO estimation
CFO estimation
Channel estimation
Interference estimation
Note: this does not preclude studying the above functionalities by using a midamble and/or postamble, if supported
FFS: Other functionalities, if any

Agreement
For the start-indicator part of the R2D time acquisition signal, ON/OFF pattern i.e. high/low voltage transmission is applied
FFS: length/pattern of ON/OFF.
FFS: when TD2R_min is applicable, whether/how the start-indicator part is included in TD2R_min or not. To be discussed in 9.4.2.2


RAN1#118bis (Hefei, China, October 14th – 18th,  2024)

Agreement
The start indicator part of the R2D time acquisition signal is not included in TD2R_min.

Agreement
The TR will capture the following options, and companies are encouraged to analyze the tradeoffs among the following D2R amble(s) options:
Option 1: D2R preamble only
Option 2: D2R preamble + X midamble(s), where X 1
Option 3: D2R preamble + postamble
Option 4: D2R preamble + Y midamble(s) + postamble, where Y1
For the above options, companies are encouraged to report at least the following:
Purpose(s) of the preamble, midamble and postamble 
Whether companies assume multiple options can be supported


Agreement
For analysing the trade-offs among the D2R amble(s) options, companies can refer to the Table 3.2.4 in section 3.2.4 of R1-2408993 for information.

Agreement
For the clock-acquisition part of the R2D time acquisition signal, following is captured in the TR 38.769:
Clock-acquisition part is based on OOK without line coding and includes rising/falling edges, including at least two rising or at least two falling edges for the device to determine the OOK chip duration

Agreement
For the start-indicator part of the R2D time acquisition signal, for providing the start of the R2D transmission, following is captured in the TR 38.769:
Following options have been studied for the start-indicator part of the R2D time acquisition signal:
Option 1: ON-OFF transmission is considered based on energy/edge detection, and multiple alternatives have been studied including 
Alt 1: A single ON-OFF transmission, i.e. one high-voltage transmission followed by one low-voltage transmission, where ON and OFF may have same or different durations
Alt 2: A multi-ON-OFF transmission, where different ON and different OFF may have same or different durations and different parts may have same or different duration
Option 2: ON-OFF sequence-based design is considered which consists of a pre-defined sequence for detection of start-indicator part based on digital correlation
For both the options, it is observed that a fixed duration for the start-indicator part can be considered, regardless of the value of M used for PRDCH transmissions. 
Miss-detection ratio (MDR), false-alarm ratio (FAR) and detection complexity have been considered for the design of the R2D start indicator part by following companies
It is observed by 1 source [Huawei] that for an FAR of ~0%, the MDR of less than 1% can be achieved with Alt 2 of option 1 (considering 2 ON-OFF transmissions with different durations) and it is also observed that low-complexity and reduced power consumption can be achieved
1 source [ZTE] evaluated Alt 1 of option 1 (considering same duration for ON and OFF) and Alt 2 of option 1 (considering multiple ON-OFF transmissions with same duration) and observed that for an FAR of ~0%, the MDR of less than 1% can be achieved and Alt 1 of option 1 performs better than Alt 2 of option 1. 
1 source [CATT] observed with ON-OFF pattern, that for an FAR of ~0%, the MDR of less than 1% can be achieved with a duration of at least 1 OFDM symbol
1 source [Qualcomm] compares the performance between option 1 and option 2. It shows almost similar coverage range (SNR requirement) for target MDR of 1%. For MDR of 10%, it shows that sequence-based design provides better performance, and it is observed that during the available time, it is feasible for all devices to detect the start-indicator sequence within the power budget. It is further observed that the FAR with sequence-based design can be improved in case of interference scenarios when compared with pattern-based design. 
For both the options, it may be beneficial that the start-indicator part is distinguishable at least from other parts of the R2D transmissions

Agreement
For the clock-acquisition part of the R2D time acquisition signal for OOK chip duration determination, following options are studied:
Option 1: Duration of the clock-acquisition part is variable for different M values, i.e. the duration becomes shorter with increasing value of M
Option 2: Duration of the clock-acquisition part is constant for different M values based on repetition, i.e. repetition factor is increased with increasing value of M to keep the duration constant
FFS: Whether/what restriction on M values for the clock-acquisition part
Note: Other functionalities of clock-acquisition part is a separate discussion

Agreement
For the D2R preamble, binary signal is considered.



RAN1#119 (Orlando, US, Nov 18th – 22nd, 2024)
Agreement
Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
For coherent detection of PDRCH with a payload of 16 bits or 20 bits with 6-bit or 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code:
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, when the same amble(s) overhead is maintained, Option 3 provides comparable performance results to Option 1.
Source [7, Samsung] observed that with up to 10% SFO, ~5kbps data rate, for device 1 and with up to 1% SFO for device 2, the decoding performance with/without midamble are similar
Source [9, vivo] observed that Option 1 is sufficient to achieve 10% and 1% BLER, with no more than 8 SFO hypotheses tested at the reader side.
With up to 10% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2dB and 4 dB) for Option 1, Option 2 of D2R preamble+1midamble and Option 3.
With up to 1% SFO, ~ 5kbps data rate, the SNR needed to achieve 10% and 1% BLER is similar (~ -2.8dB and 3.3dB) for Option 1, Option 2 of D2R preamble+1 midamble and Option 3.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <5*10^3 ppm
With up to 10% SFO, achieving the required accuracy necessitates more than 20 SFO hypotheses at the reader side for Option 1 and 10 SFO hypotheses are sufficient for Option 3 of D2R preamble + postamble. But for Option 3 reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc. 
With up to 1% SFO, 4 SFO hypotheses are sufficient for Option 1 to achieve the required accuracy.

For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieves a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.


Agreement
For the CFO calibration signal, which is required only for device 2b to reduce the frequency offset range and the guard-bandwidth of D2R transmission, the following observations are captured in TR 38.769:
Source [3, Huawei] report that a single-tone RF signal is used as the CFO calibration signal, it is not a part of time acquisition signal and can be transmitted as an optional R2D signal after the PRDCH transmission. 
Sources [2, Ericsson], [19, Panasonic] and [20, OPPO] report that additional synchronization signal is needed. 
[OPPO] state the R2D timing acquisition signal may not be sufficient or may not be usable for CFO calibration since a reference frequency is needed when separate LOs are used for Tx and Rx in device 2b.
Sources [7, Samsung], [9, vivo], [30, Qualcomm], [36, Apple] report that additional synchronization signal is needed if the synchronization for carrier frequency using R2D signal/channel does not provide required functionalities for device 2b.
Source [5, CMCC][31, MTK] report that it may not be possible to achieve enough frequency accuracy (0.01 ppm) even after CFO calibration based on R2D time acquisition signals for coherent detection at reader especially when the D2R data rate is low.

Agreement
For device 2b, a signal for CFO calibration should be provided to synchronize / calibrate the device clock for LO for carrier frequency (Clock purpose #5) to achieve the accuracy after clock sync / calibration at device side captured in Table 5.2.3-1.
Frequency calibration at device 2b is beneficial at least to reduce the guard-bandwidth of D2R transmission.

Agreement
Adopt the updates documented in R1-2410653 for section 6.2 of the TR38.769. 

Agreement
Adopt following update to the TP agreed on Monday

Capture following observations in the TR 38.769, where CFO is assumed to be zero or negligible.
[omit unchanged part]
For coherent detection of PDRCH with a payload of 96bits with 16-bit CRC (or 6-bit CRC [14, Xiaomi]), using 1/2 Manchester coding and 1/3 or 1/2 convolutional code,
Sources [3, Huawei], [5, CMCC] and [14, xiaomi] observed that Option 1 cannot achieve 10% BLER.
Sources [6, ZTE], [7, Samsung], [9, vivo], [20, OPPO] and [30, QC] observed that Option 1 can achieve 10% BLER.
Sources [3, Huawei], [5, CMCC], [6, ZTE], [7, Samsung], [9, vivo], [14, xiaomi], [16, China Telecom] observed that adding additional amble improves the performance. 
Source [3, Huawei] observed that with up to 10% SFO, 
Option 2 of D2R preamble+ 1 midamble achieves 10% BLER at SNR around -3dB, but cannot achieve 1% BLER.
Option 3 of D2R preamble+ postamble achieves 10% BLER at SNR around -4dB, and can achieve 1% BLER at SNR around 4dB.
Source [5, CMCC] observed that with up to 10% SFO, Option 3 allows reader to precisely search and detect the SFO with 0.03% residual SFO at -3dB SNR TDL-A channel, achieving 10% BLER -2.44dB SNR for ~1 kbps data rate and -2.17 dB for ~6 kbps data rate. Source [5, CMCC] further observed that when the reader adopts same number of SFO hypothesis based on preamble, with 1% SFO, Option 3 can achieve 10% BLER at -4.27 dB SNR for ~1 kbps and at -4.29 dB SNR for ~6 kbps, which provides 1~2 dB performance gain when compared to 10% SFO. 
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble + 1 midamble, option 3, and option 4 of D2R preamble + 1 midamble+postamble achieve basically the same performance, the SNR for 10% BLER is 5dB for 1.25 kbps data rate.  
Source [6, ZTE] observed that with up to 10% SFO, ~1kbps data rate, and the same amble(s) overhead, Option 3 can provide 1~2 dB, 5dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 1. Additionally, Option 3 can provide ~1dB, 2dB performance gain for 10% BLER, 1% BLER, respectively, compared to Option 2 of D2R preamble +1 midamble.
Source [7, Samsung] observed that for ~5kbps data rate, compared to option 1, 
For device 1 with up to 10% SFO, Option 2 of D2R preamble + 1 midamble provides ~0.5 dB SNR gain at 10% BLER with TDL-A channel and ~0.9 dB SNR gain with TDL-D channel.
For device 2 with up to 1% SFO, Option 2 of D2R pramble + 1midamble provides ~1 dB SNR gain at 10% BLER with TDL-A channel and ~1.4 dB SNR gain with TDL-D channel.
Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception. 
Source [9, vivo] observed that, 
With up to 10% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~0.7dB and 10dB, respectively; Additionally, maintaining the same amble overhead, Option 2 (D2R preamble + 1 midamble) and Option 3 demonstrate similar performance, achieving 10% and 1% BLER at SNR around -1.7dB and 5.2dB, respectively.
With up to 1% SFO, ~5.5kbps data rate, Option 1 achieves 10% and 1% BLER at SNR ~ -1.3dB and 11dB, respectively. Additionally, with the same amble overhead, the SNR difference between Option 2 (D2R preamble+1midamble) and Option 3 for 10% and 1% BLER is less than 1dB, with SNRs ~ -3.1dB to -2.5dB for 10% BLER and ~3.6dB to 4.5dB for 1% BLER.
Source [16, China Telecom] observed that with up to 10% SFO, ~7.5kbps data rate, there is ~6~7dB performance gap at 10% BLER and ~10.5~11.5dB performance gap at 1% BLER between option 2 of D2R preamble+111 midambles and option 1. Note that Source [16, China Telecom] does not use any convolutional code.

Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission, regardless of the payload size.
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is <10^3 ppm. To achieve the required accuracy,
For Option 1, more than 50 SFO hypotheses at reader side are necessary for device with up to 10% SFO and 6 SFO hypotheses are sufficient at reader side for device with up to 1% SFO. 
For Option 3, 10 SFO hypotheses are sufficient for device with up to 10% SFO, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc.

For coherent detection of PDRCH with a payload of 400bits with 16-bit CRC, using 1/2 Manchester coding and 1/3 or 1/2 convolutional code, 
For option 1 of D2R preamble only, 
Sources [3, Huawei], [5, CMCC], [6, ZTE], [8, Spreadtrum], [9, vivo], [14, xiaomi] observed that with up to 10% SFO, 10% BLER cannot be achieved. 
Source [20, OPPO] observed that with perfect SFO estimation, 1kbps data rate and OOK modulation, there is no noticeable performance gain from using midamble(s) and/or postamble for PDRCH transmission.
For other amble options, 
Source [3, Huawei] observed that
With accurate SFO estimation, Option 2 of D2R preamble + 4 midambles can achieve 10% BLER at SNR ~ 2.7dB but cannot achieve 1% BLER.
With up to 10% SFO, Option 3 cannot achieve 10% BLER.
With up to 10% SFO, Option 4 of D2R preamble+2 midambles+postamble achieves 10% BLER at SNR of ~0.25dB; But it cannot achieve 1% BLER. Option 4 of D2R preamble+3 or 4 midambles+postamble, achieves a 10% BLER at an SNR of around -0.2 dB, and achieves 1% BLER at SNR around 9dB or 8dB, respectively.
Source [5, CMCC] observed that with up to 10% SFO, Option 4 of D2R preamble combined with 1 to 4 midambles + postamble, achieves 10% BLER at SNR of 2.5 dB, 1 dB, 0.8 dB, or 0.5 dB, respectively, for a data rate of around 1 kbps.
Source [6, ZTE] observed that with up to 10% SFO, 
Option 3 can provide ~5.5 dB performance gain compared to option 2 of D2R preamble+1midamble for 10% BLER, with the same amble(s) overhead for ~1kbps data rate.
Option 2 of D2R preamble+1midamble cannot achieve 1% BLER for ~1kbps data rate.
Option 4 of the D2R preamble+1 or 2 midamble(s)+postamble, has similar performance, it can achieve a 10% BLER at SNR of -1dB and achieves a 1% BLER at SNR of 6dB and 5dB respectively for ~1kbps data rate.  
Source [8, Spreadtrum] observed that with up to 10% SFO, 
Option 3 of D2R preamble+ postamble cannot achieve 10% BLER for ~7kpbs.  
Option 4 of D2R preamble + 1 midamble + postamble can achieve 10% BLER and 1% BLER at SNR around -6dB and 0 dB, respectively for ~7kpbs data rate.
Source [9, vivo] observed that 
With up to 10% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1 postamble demonstrate similar performance, achieving 10% BLER at SNR ~0.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~ 9.2dB and 12.8dB, respectively for ~5.5kpbs data rate.   
With up to 1% SFO, maintaining the same amble overhead, both Option 2 of D2R preamble+5 midambles and Option 4 of D2R preamble+4 midambles+1postamble demonstrate similar performance, achieving 10% BLER at SNR around -1.2dB. While for 1% BLER, the SNR for Option 2 and Option 4 is ~7.8dB and 9.1dB, respectively for ~5.5kpbs data rate.   
Source [14, xiaomi] observed that with up to 10% SFO, Option 2 of D2R preamble+3 midambles and Option 4 of D2R preamble+3 midambles+postamble can achieve 10% BLER when the SNR is within the range of [15, 25] dB for 1.25 kbps data rate. 
Source [30, Qualcomm] observed that the required SFO estimation accuracy to achieve 1% and 10% BLER is much smaller than 10^3 ppm. To achieve the required accuracy,
For Option 2 of D2R preamble+X midamble(s) where midamble inserted per every certain number of PDRCH bits (e.g., 192 bits),
For SFO estimation using each amble for the subsequent PDRCH bits (e.g., 192 bits), with up to 10% SFO, more than 50 SFO hypotheses are necessary at the reader side and with up to 1% SFO, 6 SFO hypotheses are sufficient at the reader side.
For SFO estimation based on the time gap between preamble and midamble, with up to 10% SFO, 10 SFO hypotheses are used, but reader has to store the received samples and wait for the midamble to start SFO/channel/interference estimation, demodulation, decoding, etc.
For Option 3 of D2R preamble+postamble, SFO estimation is based on the time gap between preamble and postamble, with up to 10% device SFO, 10 SFO hypotheses are used for reader, but reader has to store the received samples and wait for the postamble that is after the end of PDRCH for any of SFO/channel/interference estimation, demodulation, decoding, etc
Source [7, Samsung] observes that the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevent pipelined processing of the reception.

For the synchronization and timing tracking of D2R transmission, 
Source [5, CMCC] report that with up to 10% SFO, option 1 is not sufficient for D2R reception since the residual SFO at reader side is larger than 1%. While with option 3, the reader can precisely search and detect the SFO with a residual SFO of 0.03% at -3dB SNR TDL-A channel.
Source [14, xiaomi] report that 
For packet size of 96bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO over 100ppm decreases to 6% for Option 2, 3 and 4, but remains at 95% for Option 1.
For packet size of 400bits, when the SNR is increased from -4dB to 20dB, the ratio of device residual SFO larger than 10ppm decreases to 5% for Option 2, 3, and 4, but is still 99.6% for Option 1.
Sources [9, vivo], [15, CATT] report that SFO estimation based on D2R preamble can achieve accurate estimation without additional ambles (midamble or postamble). 
Source [9, vivo][7 Samsung] observed that for non-coherent detection of PDRCH, the number of SFO hypotheses and the SNR needed for 10% and 1% BLER cannot significantly be reduced for option 2, 3 and 4 compared to the option 1. Moreover, the additional ambles i.e., midamble(s) and/or postamble introduces additional overhead and postamble may prevents pipelined processing of the reception.     
Source [15, CATT] observed that 
The coarse estimation of SFO based on the D2R preamble indicates that the SFO estimation error is less than 1% with a probability of 99.3%, and less than 0.1% with a probability of 49.9%.
The fine estimation of SFO based on the D2R preamble shows that the SFO estimation error is less than 1% with a probability of 99.5%, and less than 0.1% with a probability of 90.8%.
Reader/gNB can achieve a probability of not less than 99.5% for SFO estimation error below 1%, and 90.8% for SFO estimation error below 0.1% by receiving D2R preamble signals.
Source [30, Qualcomm] report that for D2R with coherent demodulation at reader, the reader needs to estimate the device clock frequency with the accuracy of 0.5% (5 * 10^3 ppm) or lower for a short message (e.g., 72 bits after CRC/coding) and 0.1% (10^3 ppm) or lower for a long message (e.g., 224 bits after CRC/coding). The source further reports that design of D2R amble(s) (e.g., overhead) and the correspondingly required number of SFO hypothesis for the estimation depend on the sampling clock accuracy that the device uses for D2R. 
Source [37, MediaTek] reports that transmitting 96-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 1000 ppm, and transmitting 1000-bit packet size with 16-bit CRC requires residue SFO after reader compensation to be 100 ppm.
Note: in the observations above where coherent detection is used, sources that evaluated option 3 and option 4 assumed that the postamble is used at least for time/frequency tracking and for channel estimation.

Agreement
Following observations on R2D clock-acquisition part are captured in TR 38.769:
On impact/restriction of M values for the clock-acquisition part
9 sources [TCL, Nokia, Huawei, CMCC, ZTE, Apple, CATT, Mediatek, Qualcomm] provided observations on the impact/restriction of M values for the clock-acquisition part design requirements:
1 source [Nokia] observed that increasing value of M, while retaining the same transmission duration, improves the auto-/cross- correlation properties of the sequence due to increase in sequence length and use of   provides better timing estimation accuracy even in the presence of SFO as the sequence length spans only over a shorter duration. 
2 sources [TCL, Huawei] observed for option 1 of the clock-acquisition part design that no restriction is required to be placed on the M values. Furthermore, 1 source [Huawei] observed that the same 2 ON-OFF voltage (with the same duration) satisfies the FDR performance metric of less than 1% for different M values, e.g., M = 2, 6 and 24, where FDR is the False detection ratio (FDR), i.e. incorrectly calculating M, is the performance metric.
1 source [CMCC] observed that pattern of the clock-acquisition part is related to M chips per OFDM symbol and when M is small, the clock-acquisition part may cross multiple OFDM symbols, and the CP insertion may degrade the timing acquisition performance.
1 source [ZTE] observed that with option 2, the duration of the clock-acquisition part remains consistent across all M values, at least three OFDM symbols maybe required for clock-acquisition part and it maybe not as efficient as option1
1 source [Apple] observed that among the two options studied for the clock-acquisition part, option 2 provides increased robustness, especially in case of large value of M, when compared to option 1 and potentially increase the detection performance of the clock-acquisition part. 
1 source [CATT] observed that if the chip duration is variable based on the M value used for OOK-4 waveform, the detection performance would be limited by the received SINR of the CAP with clear transition of the rising and falling edges.
1 source [Qualcomm] observed that the option 1 with M>1 has shorter duration of clock acquisition part than M=1 and worse timing acquisition accuracy. At least part of PRDCH following the clock acquisition part may need to be used to improve the timing acquisition. Furthermore, the larger M (e.g., M>4) with small chip duration is more sensitive to the SFO accuracy and the restriction of M for the clock acquisition part may be needed.
1 source [Mediatek] further observed that different M values may impact the chip accuracy obtained by the clock acquisition part.

On impact of CP insertion/handling on the clock-acquisition part
10 sources [TCL, CMCC, ZTE, Samsung, Vivo, CATT, NTT Docomo, Qualcomm, Mediatek, Spreadtrum] observed that the CP insertion/handling may impact the design requirements of the clock-acquisition part:
1 source [CMCC] further observed that when the clock-acquisition part occupies more than one OFDM symbol, ON-OFF state transition around CP can avoid the error rising or falling edges due to the CP insertion.
1 source [ZTE] further observed that to mitigate the impact of the CP in the clock-acquisition part for large M values, it can reuse the CP handling method for PRDCH 
1 source [Samsung] further observed that CP insertion/handling on the clock-acquisition part can cause false rising/falling transition and, therefore, the clock acquisition part should be designed such that it does not incur a false rising or falling edges due to CP insertion when CP-OFDM is used for OOK signal generation.
1 source [vivo] further observed that CP insertion/handling on the clock acquisition part will impact the chip duration estimation accuracy. It is further observed that for CP handling, device may not be able to count the clock and estimate OFDM symbol duration accurately until the clock acquisition part if the start indicator only includes a single ON-OFF transmission. 
1 source [CATT] further observed that the SER will be degraded due to uneven chip interval when the CP is inserted within an OFDM symbol, where SER refers to the number of samples which is mismatched for comparing to the total number of samples in a chip.
1 source [NTT Docomo] further observed if CP insertion would cause false rising/falling edges, accuracy of timing acquisition may be impacted.   
1 source [Mediatek] further observed that the issues of chip extension, false raising/falling transition, and additional raising/falling transition caused by CP insertion/handling considering different M values will impact the chip accuracy obtained by the clock acquisition part.
1 source [Spreadtrum] further observed that the design of clock acquisition part should consider that CP insertion does not cause a false rising or falling edges and does not cause different length of multiple high / low voltages within the clock acquisition part when the clock acquisition spans multiple OFDM symbols.
1 source [Huawei] observed CP insertion/handling may not impact the design requirements of the clock-acquisition part

Agreement
For the D2R preamble design, following aspects have been studied and can be captured in the TR 38.769:
Autocorrelation Property
10 sources [Nokia, Huawei, CMCC, Xiaomi, CATT, Oppo, Ericsson, NTT Docomo, Qualcomm, ZTE] observed that the signal should have good autocorrelation properties for accurate peak detection based on the signal correlation at the reader 
Cross-correlation Property
7 sources [Nokia, CMCC, Oppo, Ericsson, Qualcomm, ZTE, CATT] observed that the signal should have good cross-correlation properties if multiple D2R preamble sequences are considered (e.g. for multiple access schemes (if supported) for D2R transmissions). 
Line coding
1 source [Nokia] observed that line coding may impact the autocorrelation property of the sequence. 
1 source [Huawei] observed that for D2R preamble, to apply backscattering, line coding can help improve the detection performance based on shifting the D2R signal’s frequency location away from the carrier wave
Sequence Types (not limited to below types only)
M-sequence
3 sources [Nokia, Vivo, Xiaomi] observed that m-sequence can be considered for D2R preamble mainly owing to good correlation properties.  
Golay sequence
4 sources [CMCC, Vivo, Xiaomi, Samsung] observed that Golay sequence can be considered for D2R preamble mainly owing to good correlation properties and availability of large number of distinct sequences and complementary pairs.  
Walsh sequence
1 source [Oppo] observed that Walsh sequence can be considered as a candidate for D2R preamble thanks to its good auto/cross-correlation property and flexible length
General Observations
1 source [Huawei] observed can achieve 0.97% residual SFO with 98% probability under -2.5dB SNR and 0.1% MDR with [-1/8, 1/8] chip timing error with 99.05% probability under -2.5dB SNR with D2R preamble including 2-parts with clock-like sampling frequency signal and timing-acquisition signal, having 32-length ‘1’ sequence (encoded to 64-chip Manchester code) and 32-length sequence (encoded to 64-chip Manchester code), respectively.
4 sources [TCL, CMCC, ZTE, Vivo] observed that for D2R preamble with binary signal, the timing synchronization performance is highly related to the sequence length of the preamble. Furthermore, 1 source [CMCC] observed that to achieve a BLER performance at 10%, the timing synchronization error should be less than 10%. Furthermore, 1 source [ZTE] observed that the channel estimation performance is also highly related to sequence length. 1 source [ZTE] observed that using a 32 bits preamble provides ~8 dB, ~5 dB performance gain than using 8 bits, 16 bits preamble, respectively. And using a 64 bits preamble provides ~2.5dB performance gain than using a 32 bits preamble.
1 source [Ericsson] observed that for D2R preamble with binary signal, normalized SFO estimation error of less than 10% can be achieved with a training sequence length 64 or longer. The simulated D2R preamble consisting of a Golay complementary pair can tolerate SFO up to 1% (AWGN) with up to 1 dB loss in performance for a sufficiently long preamble sequence length (32 or greater).

Agreement
For determining the end of PRDCH at the device, following two options are studied and captured in the TR 38.769:
Option 1: TBS information (via implicit/explicit L1 R2D control information)
Option 2: Postamble (at the end of PRDCH) 
14 sources [Nokia, Huawei, ZTE, CMCC, Samsung, Ericsson, Oppo, LGE, Qualcomm, Spreadtrum, Mediatek, Cewit, Ericsson, vivo] provided following observations on the above two options for determining the end of PRDCH:
3 sources [Nokia, Huawei, ZTE] observed that option 2 provide two benefits, namely, the variable payload length and to provide timing acquisition before the subsequent transmission of either PDRCH or PRDCH, thus improving the detectability at both reader and the device, respectively. Furthermore, 1 source [Huawei] observed that R2D postamble indicates the TBS with high efficiency for small packets by avoiding a large padding overhead, unlike option 1, which may require devices to perform blind detection of different PRDCH formats (if supported) and the overhead caused by the inclusion of a R2D postamble does not exceed 20% for even the smallest of message sizes and may be less than the signaling overhead caused by using a dedicated TBS indicator
1 source [CMCC] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead, while for large payload size with more bits, the resource overhead of postamble is smaller.
1 source [vivo] observed for option 2, that for small payload size with only a few bits, the presence of long postamble generates large resource overhead.
1 source [Samsung] observed option 2 is not strictly required, however, given the possible clock drift at a device, it may be still beneficial to also attach postamble at least for the determination of the end of PRDCH at a device. 
3 sources [Oppo, Spreadtrum, CEWiT] observed that with option 2, the false detection may be higher for shorter postamble. Source [OPPO[ observed that in contrast to option 2, it is more reliable and efficient to indicate TBS with control information in option 1
2 sources [LGE, vivo] observed that if a message type or a command ID is included in L1 control information and implicitly indicates a known size of a fixed TB, then there is no need for either option 1 or option 2
2 sources [Qualcomm, vivo] observed that option 1 has the advantages of avoiding blind detection of postamble and providing the power saving for non-target devices to skip the R2D detection.
1 source [MediaTek] observed that option 1 is feasible for the device to avoid the unnecessary reception of a TB with a specific size and thus enable power saving, e.g., when the TB has a size exceeding the allowance of the device remaining power.
1 source [Ericsson] observed option 2 is not strictly required if the end of PRDCH can be explicitly indicated by R2D control information, and it is subject to the miss-detection rate. It may be beneficial if a PRDCH postamble can serve as an additional timing acquisition signal prior to a PDRCH transmission.

Agreement
For D2R scheduling, midamble (if supported) related information can be explicitly/implicitly indicated via corresponding PRDCH.

Agreement
Following observations on R2D clock-acquisition part are additionally captured in TR 38.769:
On purpose of SFO estimation/correction based on the clock-acquisition part
3 sources [Nokia, CATT, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Nokia] observed that the length of preamble sequence may need to consider also the robustness against SFO
1 source [CATT] observed that device 2a/2b may require higher synchronization accuracy for signal transmission or backscattering and therefore, the design of CAP may be required to accommodate the requirement of additional frequency synchronization and clock calibration for Device 2a/2b. 
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for SFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support SFO correction.
On purpose of CFO estimation/correction based on the clock-acquisition part
2 sources [Ericsson, Qualcomm] provided observations on the applicability of clock-acquisition part for frequency synchronization:
1 source [Ericsson] observes that the clock-acquisition part can be utilized to solve the frequency synchronization problem without impacting the time-domain sequence, for example by transmitting in some frequency resources and it can be a harmonized solution for both chip duration indication and device frequency synchronization. However, it is further observed that if the time interval between an R2D transmission and the corresponding D2R transmission and if the device loses the timing obtained from the R2D timing acquisition signal due to timing drift at the time for the D2R transmission, then an additional synchronization signal is needed
1 source [Qualcomm] further observed for Option 1, as the CAP duration with high M is decreased, only CAP may not be sufficient for CFO correction and for Option 2, as the CAP duration is fixed and independent from M, the CAP with long enough duration can support CFO correction.


WI Phase: RAN1 Agreements (relevant for R2D/D2R signals including timing acquisition and synchronization
RAN1#120 (Athens, Greece, Feb 17th – 21st, 2025)
SIP related Agreements
Agreement
For the SIP of R-TAS, for providing the start of the R2D transmission, one single design based on Option 1 is supported and further down-selection to be done among Alt 1 and Alt 2 :
Option 1: ON-OFF transmission with following alternatives:
Alt 1: A single ON-OFF transmission with pre-defined duration for each of the ON-OFF, where ON and OFF may have same or different durations
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt1
Alt 2: A multi-ON-OFF transmission with pre-defined duration for each of the ON(s)-OFF(s), where different ON and different OFF may have same or different durations and different parts may have same or different duration
Continue discussion to clarify the duration of each of the ON and OFF
Continue discussion to list the different candidate proposals under Alt2
Only a single fixed value for entire duration of SIP of R-TAS is supported, which is independent of the value of “M” used in CAP and PRDCH
Note: Specific design and duration for SIP of R-TAS are further discussed, and companies are encouraged to evaluate the designs in terms of target MDR of [10%] for a FAR up to [1%] and at least following assumptions are used:
MDR refers to the probability that SIP is not detected when it was actually transmitted
FAR probability that the receiver incorrectly detects SIP when SIP was not transmitted
Energy/edge detection-based method is the baseline assumption for evaluation purpose
Continue discussion on necessary details for simulation assumptions

Agreement
For the SIP of R-TAS, down-select among the following candidates:
Alt 1 (Single ON-OFF transmission)
Alt 1-1: ON followed by OFF with same duration for both
Alt 1-2: ON followed by OFF with a duration ratio of 1:[2,3]
Alt 1-3: ON followed by OFF with a duration ratio of [2,3]:1
Alt 2 (Multi-ON-OFF transmission)
Alt 2-1: A number of repetition instances of Alt 1-1 or Alt 1-2 or Alt 1-3
Alt 2-2: ON-OFF-ON (duration of ON and OFF can be different)
Alt 2-3: OFF-ON-OFF (duration of ON and OFF can be different)
Alt 2-4: Combination of single instance of Alt 1-1 and single instance of Alt 1-2
For the evaluation purpose, for both options, candidate values related to duration are considered:
Entire duration of SIP: 1/2 OFDM symbol duration or 1 OFDM symbol duration (including clarifying whether OFDM symbol duration includes CP); additional durations can be considered and reported by companies with justification 
Companies to report the exact duration(s) for ON or OFF
Companies are encouraged to report at least the following details for the evaluations:
Baseline assumption is that RF transmission is not present; companies can report other consideration
For FAR calculation, whether noise and/or PRDCH transmission is considered
Details on threshold detection method including whether/how threshold detection training is used based on the proposed design alternative or not
BW assumptions for RF-ED and BB-LPF
Target MDR of up to 1% for FAR of up to [1%, 10%]

CAP related Agreements
Agreement
For the CAP of R-TAS, the starting chip has a different voltage level compared to the end of the SIP of R-TAS.

Agreement
For the design of the CAP of R-TAS, at least 2 transition edges in same direction are included, i.e. at least two transitions from “OFF” chip to “ON” chip or two transitions from “ON” chip to “OFF” chip.

Agreement
For the CAP of R-TAS:
Candidate values for maximum duration of CAP to be further down-selected to one value from : 1.5 OFDM symbol duration, 2 OFDM symbol duration, 3 OFDM symbol duration
For option 1 for CAP of R-TAS from TR 38.769, maximum duration is applicable to minimum value of M to be supported, and the CAP duration becomes shorter with increasing value of M
FFS: whether the number of ON/OFF transmissions in the CAP is fixed or not fixed
For option 2 for CAP of R-TAS from TR 38.769, maximum duration is the only (constant) duration that is applicable for all the M values to be supported
Down-selection between option 1 and option 2 for CAP of R-TAS from TR 38.769 by RAN1#120-bis
FFS: Values of M to be supported


R2D Midamble related Agreement
Agreement
R2D transmission does not include a midamble.

D2R X-amables related Agreement
Agreement
For D2R preamble design, the functionalities of timing acquisition, SFO estimation/time tracking and channel estimation should be supported
For D2R midamble design, the functionalities of SFO estimation/time tracking and channel estimation should be supported
D2R midamble can be transmitted at the end of the PDRCH transmission. If it is at the end, it is not designed for being used for indicating the end of PDRCH transmission
FFS: condition(s) and/or indication where the D2R midamble is present or not

Agreement
For D2R x-ambles:
Following is considered as the types for base sequence and to be further down-selected:
Option 1: M-sequence 
Option 2: Golay sequence
Note: Above doesn’t preclude an additional part for preamble, e.g. with ON and/or OFF transmission, if needed/supported
FFS: Whether/what multiple sequences (using same base sequence type) are supported
Note: This in no way implies that there is going to be CDMA between D2R x-ambles
For evaluation purpose, companies are encouraged to consider following:
Performance at least in terms of autocorrelation/cross-correlation property, SFO estimation/Timing accuracy, SNR for target PDRCH BLER of [1%, 10%]
Report presence and time-domain resource(s) x-ambles
Report sequence type(s) and length(s) for x-ambles
Following format can be considered for reporting the evaluation results



RAN1#120bis (Wuhan, China, April 7th – 11th, 2025)
R-TAS related Agreements (including SIP and CAP)

Agreement
For the pattern of SIP of R-TAS, only the following 2 alternatives are considered for further down-selection:
Alt 1-2: ON-OFF with a ratio of 1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration
Alt 2-4: ON-OFF-ON-OFF with a ratio of 1:1:1:3 and with following total SIP duration to be further down-selected:
Option 1: 0.5 OFDM symbol duration
Option 2: 1 OFDM symbol duration

Agreement
For CAP of R-TAS, following is adopted:
Option 1 for CAP of R-TAS from TR 38.769 is adopted where the CAP duration becomes proportionally shorter with increasing value of M, i.e. if for , duration is  OFDM symbol long, then for , duration is  OFDM symbol long
Note: Duration without CP insertion is considered above, with CP insertion, the total duration may not be exactly proportional
Only following two alternatives for CAP pattern are considered for further down-selection to one alternative:
Alt 1: ON-OFF-ON-OFF
Alt 2: ON-OFF-ON


Agreement
For R-TAS, SIP duration of 1 OFDM symbol is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.

D2R x-ambles related Agreements (including preamble and midamble)

Agreement
For D2R midamble, for determining the presence and location of midamble(s) at the device:
Reader explicitly indicates the same interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information
FFS: details of signalling
FFS: whether the reader can explicitly indicate with one bit whether a midamble is additionally present at the end
Note: This does not preclude the support of having no midamble present in the D2R transmission

Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH

Agreement
For indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following is adopted:
Unit of interval is number of bits after FEC (if FEC is applied) and repetition (if repetition is applied)
FFS: the candidate values in terms of the unit of interval






RAN1#121 (St Julian’s, Malta, May 19th  – 23rd , 2025)

Agreement
Confirm the working assumption in the following agreement from RAN1#120bis:
Agreement
For D2R preamble/midamble, base sequence is generated from m-sequence, where the length of the sequence is 
Value(s) of n
Long preamble/midamble is generated based on n = 5
Working assumption: Short preamble/midamble is generated based on n=3 
Only 1-part preamble/midamble are supported for D2R
Preamble immediately precedes the PDRCH without any gap
Both long and short preamble and midamble are supported based on the working assumption on n
when midamble is present at least the following cases are supported and reader explicitly indicates one of the following cases for PDRCH:
Short preamble and short midamble 
Long preamble and long midamble 
Note: the case of short preamble and long midamble will not be supported
When midamble is not present the reader explicitly indicates short or long preamble for PDRCH


Agreement
M = {2,6,12,24} are adopted for CAP and same M value is used for CAP and PRDCH in an R2D transmission.

Agreement
For D2R ambles,
For n = 3, adopt m-sequence with following:
Polynomial: x³ + x² + 1
Initial State: Down-select between 010 or 100
Resulting Sequence: Down-select between 0 1 0 0 1 1 1 (for 010 initial state) or 1 0 0 1 1 1 0 (for 100 initial state)
For n = 5, adopt m-sequence with following:
Polynomial: x⁵ + x³ + 1
Initial State: 01001
Resulting Sequence: 0 1 0 0 1 0 0 0 0 1 0 1 0 1 1 1 0 1 1 0 0 0 1 1 1 1 1 0 0 1 1

Agreement
SIP of R-TAS is adopted with 2 OFDM symbol duration, i.e. ON-OFF-ON-OFF with a ratio of 2:2:1:3
Note: Detection method of SIP presence at the device is not specified
Agreement from RAN1#120bis is updated as follows:
Agreement
For R-TAS, SIP duration of 1 2 OFDM symbols is adopted with CAP pattern ON-OFF-ON-OFF for all values of M corresponding to PRDCH 
Note: device cannot assume the presence/absence of RF transmission prior to the SIP.
OPPO expressed the concern that the agreement above has higher overhead and latency.

Agreement
For D2R, for indicating the interval between consecutive midambles, and between the preamble and the first midamble, via R2D control information, following interval values are adopted:
For bit duration of 266.67μs
I = 48 bits, 96 bits, 168 bits, 240 bits
For other supported bit durations of 266.67μs/Y
I = Y * {48, 96, 168, 240} bits
Values of Y: 2, 4, 8, 16, 32, 64, 192
For signaling via R2D control information, following is adopted:
1-bit length codepoint is used to indicate whether long or short preamble/midamble is applied at the device, where “0” indicates short preamble/midamble and “1” indicates long preamble/midamble
Midamble interval is indicated by a 2-bit length codepoint 
Lowest to highest codepoint value indicates lowest to highest interval value 
1-bit length codepoint is used to indicate whether the midamble is present at the end or not, where “0” indicates no midamble present at the end and “1” indicates midamble present at the end
Note: if the indicated interval is longer than the number of bits after FEC (if FEC is applied) and repetition (if repetition is applied), and 1-bit length codepoint does not indicate midamble present at the end, then there is no midamble.


Agreement
For m-sequence with n =3 for D2R ambles, adopt initial State of 100 and resulting sequence of 1 0 0 1 1 1 0

Agreement
R2D postamble is specified with 4 ON chips corresponding to M value of the PRDCH 
R2D postamble is added immediately after the PRDCH
R2D postamble has always 4 ON chips
Note: For M=24, 2 ON chips at the end of OFDM symbol for CP handling are in addition to R2D postamble, and are not part of the R2D postamble
R2D padding duration is determined after R2D postamble insertion
TBS information for R2D is supported via higher layer R2D control signalling.
Send LS to RAN2 asking to include R2D TBS information (excluding CRC length) in higher layer signaling, at least for messages with variable size.
Note: Exact method for determining the end of PRDCH at the device is not specified.
TDoc file conclusion not found

02-Jun-2025 18:14:49

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